MCP19111 Datasheet, PDF (161/222 Pages) Microchip Technology – Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver

27.4.5 SLAVE MODE 10-BIT ADDRESS
RECEPTION
This section describes a standard sequence of events
for the MSSP module configured as an I²C Slave in
10-bit Addressing mode.
Figure 27-12 is used as a visual reference for this
description.
This is a step-by-step process of what must be done
by slave software to accomplish I²C communication.
1. Bus starts Idle.
2. Master sends Start condition; S bit of SSPSTAT
is set; SSPIF is set, if interrupt on Start detect is
enabled.
3. Master sends matching high address with R/W
bit clear; UA bit of the SSPSTAT register is set.
4. Slave sends ACK and SSPIF is set.
5. Software clears the SSPIF bit.
6. Software reads received address from SSPBUF
clearing the BF flag.
7. Slave loads low address into SSPADDx,
releasing SCL.
8. Master sends matching low-address byte to the
Slave; UA bit is set.
Note: Updates to the SSPADDx register are not
allowed until after the ACK sequence.
9. Slave sends ACK and SSPIF is set.
Note:
If the low address does not match, SSPIF
and UA are still set so that the slave soft-
ware can set SSPADDx back to the high
address. BF is not set because there is no
match. CKP is unaffected.
10. Slave clears SSPIF.
11. Slave reads the received matching address
from SSPBUF clearing BF.
12. Slave loads high address into SSPADD.
13. Master clocks a data byte to the slave and
clocks out the slaves ACK on the 9th SCL pulse;
SSPIF is set.
14. If SEN bit of SSPCON2 is set, CKP is cleared by
hardware and the clock is stretched.
15. Slave clears SSPIF.
16. Slave reads the received byte from SSPBUF
clearing BF.
17. If SEN is set, the slave sets CKP to release the
SCL.
18. Steps 13–17 repeat for each received byte.
19. Master sends Stop to end the transmission.
MCP19111
27.4.6 10-BIT ADDRESSING WITH
ADDRESS OR DATA HOLD
Reception using 10-bit addressing with AHEN or DHEN
set is the same as with 7-bit modes. The only difference
is the need to update the SSPADDx register using the
UA bit. All functionality, specifically when the CKP bit is
cleared and SCL line is held low, are the same.
Figure 27-13 can be used as a reference of a slave in
10-bit addressing with AHEN set.
Figure 27-14 shows a standard waveform for a slave
transmitter in 10-bit Addressing mode.
 2013 Microchip Technology Inc.
DS22331A-page 161