TC1307 Datasheet, PDF (16/28 Pages) Microchip Technology – Four-Channel CMOS LDO with Select Mode, Shutdown and Independent Reset

TC1307
5.0 APPLICATIONS
5.1 Load Partitioning
The TC1307 can be used to power two separate chan-
nels for a wide range of applications. Each channel can
be turned ON and OFF independently of the other. In
this example, the SELECT12 pin is tied to V_IN and the
SELECT34 pin is tied to GND. The output voltages of
V_OUT1 and V_OUT2 are 3.0V and the output voltage of
V_OUT3 and V_OUT4 are 1.8V. If V_OUT1 and V_OUT3 were
powering 1 Channel and V_OUT2 and V_OUT4 were pow-
ering an identical Channel, either Channel could be
powered independent of the other Channel. The output
voltage of V_OUT1 is being monitored by the internal volt-
age detection circuit. When the output of V_OUT1 is
below the typical 2.63V threshold voltage, the RESET
output will transition low.
5.2 Input Capacitor
Low input source impedance is necessary for the LDO
to operate properly. When operating off of batteries or
in applications with long lead length (>10”) between the
input source and the LDO, some input capacitance is
required. A minimum of 2.2 µF is recommended for
most applications and the capacitor should be placed
as close to the input of the LDO as practical (>0.2”).
Larger input capacitors will help reduce the input
impedance and further reduce any high frequency
noise on the input and output of the LDO. If more than
1 µF of capacitance is used on the LDO outputs, a
4.7 µF input capacitor is recommended.
5.3 Output Capacitor
A minimum output capacitance of 1 µF for the TC1307
is required for stability. The esr requirements on the
output capacitor are between 0 and 2 ohms. The output
capacitor should be located as close to the LDO output
as practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the accept-
able esr range required. A typical 1 µF X5R 0805
capacitor has an esr of 50 milli-ohms. Larger output
capacitors can be used with the TC1307 to improve
dynamic behavior, noise and ripple rejection perfor-
mance.
5.4 Power Dissipation
The internal power loading within the TC1307 is a func-
tion of input voltage, output voltage, output current, qui-
escent current and RESET output dissipation. For
many applications the power dissipation within the lin-
ear P-Channel device can be used as a good approxi-
mation of total power dissipation. This is due to the low
quiescent current consumed even when the LDO out-
put is providing full load current (150 mA).
Shutdown #2
Shutdown #1
4.7 µF
Battery
Input
V_DET
1
SHDN1
2
SELECT12
3
V_IN
4
V_IN
5
GND
6
SHDN3 ₇
V_IN
8
TC1307
16 ^RESET
SHDN2
15
V_OUT1
14
V_OUT2
13
+3.0V
V_OUT3
12
+1.8V
1 µF
V_OUT4
11
+1.8V
1 µF
SELECT34 1 µF
10
9 ^SHDN4
Micro
Controller
MCLR
or
RESET
+3.0V
V_DD
1 µF
Shutdown #3
Shutdown #4
FIGURE 5-1: Typical 4 Output with RESET Application.
DS21702A-page 16
 2002 Microchip Technology Inc.