MCP19116 Datasheet, PDF (134/246 Pages) Microchip Technology – Digitally Enhanced Power Analog Synchronous Low-Side PWM Controller with Improved 8k Word Core

MCP19116/7
20.5 Interrupt-On-Change Registers
REGISTER 20-1: IOCA: INTERRUPT-ON-CHANGE PORTGPA REGISTER
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
IOCA7
IOCA6
IOCA5
—
IOCA3
IOCA2
bit 7
R/W-0
IOCA1
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-0
IOCA<7:6>: Interrupt-on-Change PORTGPA register bits
1 = Interrupt-on-change enabled on the pin
0 = Interrupt-on-change disabled on the pin
IOCA<5>: Interrupt-on-Change PORTGPA register bit ⁽¹⁾
1 = Interrupt-on-change enabled on the pin
0 = Interrupt-on-change disabled on the pin
Unimplemented: Read as ‘0’
IOCA<3:0>: Interrupt-on-Change PORTGPA register bits
1 = Interrupt-on-change enabled on the pin
0 = Interrupt-on-change disabled on the pin
Note 1: The Interrupt-on-Change on GPA5 is disabled if GPA5 is configured as MCLR.
REGISTER 20-2: IOCB: INTERRUPT-ON-CHANGE PORTGPB REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
U-0
IOCB7 ⁽¹⁾
IOCB6 ⁽¹⁾
IOCB5 ⁽¹⁾
IOCB4 ⁽¹⁾
—
bit 7
U-0
R/W-0
—
IOCB1
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n = Value at POR
bit 7-4
bit 3-2
bit 1-0
IOCB<7:4>: Interrupt-on-Change PORTGPB register bits
1 = Interrupt-on-change enabled on the pin
0 = Interrupt-on-change disabled on the pin
Unimplemented: Read as ‘0’
IOCB<1:0>: Interrupt-on-Change PORTGPB register bits
1 = Interrupt-on-change enabled on the pin
0 = Interrupt-on-change disabled on the pin
Note 1: MCP19117 only.
R/W-0
IOCA0
bit 0
R/W-0
IOCB0
bit 0
DS20005479B-page 134
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