MCP6041T-I Datasheet, PDF (12/40 Pages) Microchip Technology – 600 nA, Rail-to-Rail Input/Output Op Amps

MCP6041/2/3/4
4.0 APPLICATIONS INFORMATION
The MCP6041/2/3/4 family of op amps is manufactured
using Microchip’s state of the art CMOS process.
These op amps are unity gain stable and suitable for a
wide range of general purpose, low-power applica-
tions.
See Microchip’s related MCP6141/2/3/4 family of op
amps for applications, at a gain of 10 V/V or higher,
needing greater bandwidth.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The MCP6041/2/3/4 op amps are designed to not
exhibit phase inversion when the input pins exceed the
supply voltages. Figure 2-10 shows an input voltage
exceeding both supplies with no phase inversion.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors, and to minimize input bias
current (I_B). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
V_SS. They also clamp any voltages that go too far
above V_DD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass
quick ESD events within the specified limits.
V_DD
Bond
Pad
V_IN+
Bond
Pad
Input
Stage
Bond
Pad
V_IN–
V_SS
Bond
Pad
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
(and voltages) at the input pins (see Absolute Maxi-
mum Ratings † at the beginning of Section 1.0 “Elec-
trical Characteristics”). Figure 4-2 shows the
recommended approach to protecting these inputs.
The internal ESD diodes prevent the input pins (V_IN+
and V_IN–) from going too far below ground, and the
resistors R₁ and R₂ limit the possible current drawn out
of the input pins. Diodes D₁ and D₂ prevent the input
pins (V_IN+ and V_IN–) from going too far above V_DD, and
dump any currents onto V_DD. When implemented as
shown, resistors R₁ and R₂ also limit the current
through D₁ and D₂.
V_DD
D₁
V₁
R_{1 D2}
MCP604X
V₂
R₂
V_OUT
R₃
R₁
>
V_SS
–
(minimum expected
2 mA
V₁)
R₂
>
V_SS
–
(minimum expected
2 mA
V₂)
FIGURE 4-2:
Inputs.
Protecting the Analog
It is also possible to connect the diodes to the left of the
resistor R₁ and R₂. In this case, the currents through
the diodes D₁ and D₂ need to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC current into the input pins (V_IN+ and
V_IN–) should be very small.
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (V_CM) is below ground (V_SS); see
Figure 2-33. Applications that are high impedance may
need to limit the useable voltage range.
4.1.3 NORMAL OPERATION
The input stage of the MCP6041/2/3/4 op amps uses
two differential input stages in parallel. One operates at
a low common mode input voltage (V_CM), while the
other operates at a high V_CM. With this topology, the
device operates with a V_CM up to 300 mV above V_DD
and 300 mV below V_SS. The input offset voltage is
measured at V_CM = V_SS – 0.3V and V_DD + 0.3V to
ensure proper operation.
There are two transitions in input behavior as V_CM is
changed. The first occurs, when V_CM is near
V_SS + 0.4V, and the second occurs when V_CM is near
V_DD – 0.5V (see Figure 2-3 and Figure 2-6). For the
best distortion performance with non-inverting gains,
avoid these regions of operation.
DS21669D-page 12
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