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TC500 Datasheet, PDF (11/28 Pages) TelCom Semiconductor, Inc – PRECISION ANALOG FRONT ENDS
6.0 TYPICAL APPLICATIONS
6.1 Component Value Selection
The procedure outlined below allows the user to arrive
at values for the following TC5XX design variables:
1. Integration Phase Timing
2. Integrator Timing Components (RINT, CINT)
3. Auto Zero and Reference Capacitors
4. Voltage Reference
6.2 Select Integration Time
Integration time must be picked as a multiple of the
period of the line frequency. For example, TINT times of
33msec, 66msec and 132msec maximize 60Hz line
rejection.
6.3 DINT and IZ Phase Timing
The duration of the DINT phase is a function of the
amount of voltage stored on the integrator during TINT
and the value of VREF. The DINT phase must be initi-
ated immediately following INT and terminated when
an integrator output zero-crossing is detected. In gen-
eral, the maximum number of counts chosen for DINT
is twice that of INT (with VREF chosen at VIN(MAX) /2).
6.4 Calculate Integrating Resistor
(RINT)
The desired full scale input voltage and amplifier output
current capability determine the value of RINT. The
buffer and integrator amplifiers each have a full-scale
current of 20µA.
The value of RINT is therefore directly calculated in the
following equation:
EQUATION 6-1:
VIN(MAX)
RINT(in MΩ) = 20
Where:
VIN(MAX) = Maximum input voltage (full count voltage)
RINT = Integrating Resistor (in MΩ)
For loop stability, RINT should be ≥ 50kΩ.
6.5 Select Reference (CREF) and Auto
Zero (CAZ) Capacitors
CREF and CAZ must be low leakage capacitors (such as
polypropylene). The slower the conversion rate, the
larger the value CREF must be. Recommended capac-
itors for CREF and CAZ are shown in Table 6-1. Larger
values for CAZ and CREF may also be used to limit
rollover errors.
TC500/A/510/514
TABLE 6-1: CREF AND CAZ SELECTION
Conversions Typical Value of
Per Second CREF, CAZ (µF)
Suggested* Part
Number
>7
0.1
SMR5 104K50J01L4
2 to 7
0.22
SMR5 224K50J02L4
2 or less
0.47
SMR5 474K50J04L4
Note: Manufactured by Evox-Rifa, Inc.
6.6 Calculate Integrating Capacitor
(CINT)
The integrating capacitor must be selected to maximize
integrator output voltage swing. The integrator output
voltage swing is defined as the absolute value of VDD
(or VSS) less 0.9V (i.e., IVDD - 0.9VI or IVSS + 0.9VI).
Using the 20µA buffer maximum output current, the
value of the integrating capacitor is calculated using the
following equation.
EQUATION 6-2:
(TINT) (20 x 10 -6)
CINT =
(VS - 0.9)
µF
Where:
TINT = Integration Period
VS = IVDDI or IVSSI, whichever is less (TC500/A
VS = IVDDI (TC510, TC514)
It is critical that the integrating capacitor has a very low
dielectric absorption. Polypropylene capacitors are an
example of one such dielectic. Polyester and Polybicar-
bonate capacitors may also be used in less critical
applications. Table 6-2 summarizes recommended
capacitors for CINT.
TABLE 6-2:
RECOMMENDED CAPACITOR
FOR CINT
Note:
Value
Suggested Part Number*
0.1
SMR5 104K50J01L4
0.22
SMR5 224K50J02L4
0.33
SMR5 334K50J03L4
0.47
SMR5 474K50J04L4
Manufactured by Evox-Rifa, Inc.
6.7 Calculate VREF
The reference deintegration voltage is calculated using
the following equation:
EQUATION 6-3:
VREF = (VS – 0.9) (CINT) (RINT) V
2(RINT)
© 2002 Microchip Technology Inc.
DS21428B-page 11