FAN2558 Datasheet, PDF (9/12 Pages) Fairchild Semiconductor – 180mA Low Voltage CMOS LDO

PACKAGE DIMENSIONS
CASE 873A-03
ISSUE B
PIN 1 INDEX
6
D1
4X
0.20 H A-B D
D1/2
32
25
e/2
3 A, B, D
1
E1/2 ^A
6 E1
8
DETAIL G
7
4X
0.20 C A-B D
9
D
D/2
4
D
B
E4
17 ^E/2
H
28X e
SEATING
PLANE
C
DETAIL AD
32X
0.1 C
PLATING
BASE
METAL
b1
c
c1
A ^A2
A1
8X _(θ1˚)
R R2
R R1
b
58
0.20 M C A-B D
SECTION F-F
0.25
GAUGE PLANE
(S)
L
θ˚
(L1)
DETAIL AD
F
F
DETAIL G
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
3. DATUMS A, B, AND D TO BE DETERMINED AT
DATUM PLANE H.
4. DIMENSIONS D AND E TO BE DETERMINED AT
SEATING PLANE C.
5. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED
THE MAXIMUM b DIMENSION BY MORE THAN
0.08-mm. DAMBAR CANNOT BE LOCATED ON THE
LOWER RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSION AND ADJACENT LEAD OR
PROTRUSION: 0.07-mm.
6. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
0.25-mm PER SIDE. D1 AND E1 ARE MAXIMUM
PLASTIC BODY SIZE DIMENSIONS INCLUDING
MOLD MISMATCH.
7. EXACT SHAPE OF EACH CORNER IS OPTIONAL.
8. THESE DIMENSIONS APPLY TO THE FLAT
SECTION OF THE LEAD BETWEEN 0.1-mm AND
0.25-mm FROM THE LEAD TIP.
MILLIMETERS
DIM MIN MAX
A 1.40 1.60
A1 0.05 0.15
A2 1.35 1.45
b 0.30 0.45
b1 0.30 0.40
c 0.09 0.20
c1 0.09 0.16
D
9.00 BSC
D1
7.00 BSC
e
0.80 BSC
E
9.00 BSC
E1
7.00 BSC
L 0.50 0.70
L1
1.00 REF
q 0˚
7˚
q1 12 REF
R1 0.08 0.20
R2 0.08 ---
S
0.20 REF
Advanced Clock Drivers Device Data
Freescale Semiconductor
Freescale Confidential Proprietary
NDA Required / Preliminary
MC100ES8111
9