MIC7400_15 Datasheet, PDF (30/68 Pages) Micrel Semiconductor – Configurable PMIC, Five-Channel Buck Regulator Plus One-Boost with HyperLight Load® and I2C Control

Micrel, Inc.
MIC7400
Figure 10. POR
Power-Down Sequencing
When power is removed from V_IN, all the regulators try to
maintain the output voltage until the input voltage falls
below the UVLO limit of 2.35V as shown in Figure 11.
Figure 9. Hot Plug − VIN Rising
VSLT Pin
The power-on reset threshold toggles between two
different ranges by driving the VSLT pin high or low. The
lower range of 2.25V to 3.25V is selected when the VSLT
pin is tied to ground. The upper range, 3.25V to 4.25V, is
selected when the VSLT pin is tied to V_IN.
Programmable Power-on-Reset (POR) Delay
The POR output pin provides the user with a way to let
the SOC know that the input power is failing. If the input
voltage falls below the power-on reset lower threshold
level, the POR output immediately goes low. The lower
threshold is set in the PORDN register and the upper
threshold uses PORUP register.
The low-to-high POR transition can be delayed from 5ms
to 160ms in 5ms increments. This feature can be used to
signal the SOC that the power supplies are stable. The
PORDEL register sets the delay of the POR pin. The
POR delay starts as soon as the AVIN pin voltage rises
above the power-on reset upper threshold limit. Figure 10
shows the POR operation.
March 3, 2015
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Figure 11. Hot Un-Plug − VIN Falling
Revision 2.0