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MIC7400_15 Datasheet, PDF (28/68 Pages) Micrel Semiconductor – Configurable PMIC, Five-Channel Buck Regulator Plus One-Boost with HyperLight Load® and I2C Control
Micrel, Inc.
tSS = T1+ T2
T2
=


(VOUT − 1.4V
0.2V
)


×
tRAMP
T2 =  (12V − 1.4V) ×16µs
 0.2V 
Eq. 2
Where:
T1 = 367µs
T2 = 848µs
tSS = 367µs + 848µs = 1.215ms
VOUT = Output voltage
tRAMP = Output dwell time = 16µs
Boost Digital Voltage Control (DVC)
The boost output control works the same way as the
buck, except that the voltage steps are 200mV, see
Figure 7. When the boost is programmed to a lower
voltage the output ramps down at a rate determined by
the output ramp rate (tRAMP), the output capacitance and
the external load. During both the ramp up and down
time, the power good output is blanked and if the power
good mask bit is set to “1”.
Figure 7. Boost DVC Control Ramp
MIC7400
The ramp time can be computed using Equation 3:
∆t
=

VOUT
− VOUT
0.2V
_ INIT

×
tRAMP
Eq. 3
Where:
VOUT_INIT = Initial output voltage
Table 2. Boost Output Default Soft-Start Time
VOUT
(V)
tRAMP
(µs)
tSS
(ms)
VOUT6
12
16
1.215
Buck Current Limit
The MIC7400 buck regulators have high-side current
limiting that can be varied by a 4-bit code. If the regulator
remains in current limit for more than seven consecutive
PWM cycles, the output is latched off, the over-current
status register bit is set to 1, the power-good status
register bit is set to 0 and the global power good (PG)
output pin is pulled low. An overcurrent fault on one
output will not disable the remaining outputs. Table 3
shows the current limit register settings verses output
current. The current limit register setting is set at twice
the maximum output current.
Table 3. Buck Current Limit Register Settings
IOUT(MAX)
IPROG
BINARY
HEX
0.5A
1.1A
1111
F’h
1.0A
2.1A
1101
D’h
1.5A
3.1A
1011
B'h
2.0A
4.1A
1001
9'h
2.5A
5.1A
0111
7'h
3.0A
6.1A
0101
5'h
The output can be turned back on by recycling the input
power or by software control. To clear the overcurrent
fault by software control, set the enable register bit to “0”
then clear the overcurrent fault by setting the fault
register bit to “0”. This will clear the over-current and
power good status registers. Now the output can be re-
enabled by setting the enable register bit to “1”.
March 3, 2015
28
Revision 2.0