MIC28510_12 Datasheet, PDF(3/30 Page) Micrel Semiconductor – 75V/4A Hyper Speed Control Synchronous DC/DC Buck Regulator

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MIC28510_12 Datasheet, PDF (3/30 Pages) Micrel Semiconductor – 75V/4A Hyper Speed Control Synchronous DC/DC Buck Regulator

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Micrel, Inc.

MIC28510

Pin Description (Continued)

Pin Number

Pin Name

SGND

VDD

PVDD

Pin Function

Frequency Setting Pin.

Enable (Input). A logic level control of the output. The EN pin is CMOS-compatible. Logic high =

enable, logic low = shutdown. In the off state, the VDD supply current of the device is reduced

(typically 0.7mA). Do not pull the EN pin above the VDD supply. This pin has 100k pull-up resistor to

VDD.

Feedback (Input). Input to the transconductance amplifier of the control loop. The FB pin is

regulated to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the

desired output voltage.

Signal Ground. SGND must be connected directly to the ground planes. Do not route the SGND pin

to the PGND Pad on the top layer; see PCB layout guidelines for details.

VDD Bias (Input). Power to the internal reference and control sections of the MIC28510. The VDD

operating voltage range is from 4.5V to 5.5V. A 2.2ÂµF ceramic capacitor from the VDD pin to the

PGND pin must be placed next to the IC. VDD must be powered up at the same time or after PVIN

to make the soft-start function correctly.

Power Supply for Gate Driver of Bottom MOSFET.

March 2012

M9999-030912-A

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