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MIC28510_12 Datasheet, PDF (16/30 Pages) Micrel Semiconductor – 75V/4A Hyper Speed Control Synchronous DC/DC Buck Regulator | |||
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Micrel, Inc.
Figure 3 shows the operation of the MIC28510 during
load transient. The output voltage drops due to the
sudden load increase, which causes the VFB to be less
than VREF. This will cause the error comparator to trigger
an ONâtime period. At the end of the ONâtime period, a
minimum OFFâtime tOFF(min) is generated to charge CBST
since the feedback voltage is still below VREF. Then, the
next ONâtime period is triggered due to the low
feedback voltage. Therefore, the switching frequency
changes during the load transient, but returns to the
nominal fixed frequency once the output has stabilized at
the new load current level. With the varying duty cycle
and switching frequency, the output recovery time is fast
and the output voltage deviation is small in MIC28510
converter.
Figure 3. MIC28510 Load Transient Response
Unlike true currentâmode control, the MIC28510 uses
the output voltage ripple to trigger an ONâtime period.
The output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough.
In order to meet the stability requirements, the
MIC28510 feedback voltage ripple should be in phase
with the inductor current ripple and large enough to be
sensed by the gm amplifier and the error comparator.
The recommended feedback voltage ripple is
20mV~100mV. If a lowâESR output capacitor is
selected, then the feedback voltage ripple may be too
small to be sensed by the gm amplifier and the error
comparator. Also, the output voltage ripple and the
feedback voltage ripple are not necessarily in phase with
the inductor current ripple if the ESR of the output
capacitor is very low. In these cases, ripple injection is
required to ensure proper operation. Please refer to
âRipple Injectionâ subsection in Application Information of
this datatsheet for more details regarding the ripple
injection technique.
MIC28510
SoftâStart
Softâstart reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC28510 implements an internal digital softâstart
by making the 0.8V reference voltage VREF ramp from 0
to 100% in approximately 6ms with 9.7mV steps.
Therefore, the output voltage is controlled to increase
slowly with a stairâcase VFB ramp. Once the softâstart
cycle ends, the related circuitry is disabled to reduce
current consumption. VDD must be powered up at the
same time or after VIN to allow the softâstart function
correctly.
Current Limit
The MIC28510 uses the RDS(ON) of the internal lowâside
power MOSFET to sense overâcurrent conditions. This
method will avoid adding cost, use of additional board
space and power losses taken by a discrete current
sense resistor.
In each switching cycle of the MIC28510 converter, the
inductor current is sensed by monitoring the lowâside
MOSFET in the OFF period. If the peak inductor current
is greater than 7A, then the MIC28510 turns off the
highâside MOSFET and a softâstart sequence is
triggered. This mode of operation is called âhiccup
modeâ and its purpose is to protect the downstream load
in case of a hard short. The currentâlimit threshold has a
foldback characteristic related to the feedback voltage,
as shown in Figure 4.
Current-Limit Threshold
vs. Feedback Voltage
12
VIN = 48V
10
8
6
4
2
0
0.0
0.2
0.4
0.6
0.8
1.0
FEEDBACK VOLTAGE (V)
Figure 4. MIC28510 CurrentâLimit Foldback Characteristic
March 2012
16
M9999-030912-A
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