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MIC28510_12 Datasheet, PDF (21/30 Pages) Micrel Semiconductor – 75V/4A Hyper Speed Control Synchronous DC/DC Buck Regulator
Micrel, Inc.
Figure 7c. Invisible Ripple at FB
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node SW via a resistor RINJ and a
capacitor CINJ, as shown in Figure 7c.
The injected ripple is:
ΔVFB(PP)

VIN
K DIV
D(1- D)
1
fSW  τ
Eq. 19
K DIV

R1//R2
RINJ  R1//R2
Eq. 20
where:
VIN = Power stage input voltage
D = Duty cycle
fSW = Switching frequency
τ = (R1//R2//RINJ) × CFF
In Equations 19 and 20, it is assumed that the time
constant associated with CFF must be much greater than
the switching period:
1
fSW 

T

 1
Eq. 21
If the voltage divider resistors R1 and R2 are in the kΩ
range, a CFF of 1nF to 22nF can easily satisfy the large
time constant requirements. Also, a 100nF injection
capacitor CINJ is used in order to be considered as short
for a wide range of the frequencies.
MIC28510
The process of sizing the ripple injection resistor and
capacitors is:
Step 1. Select CFF to feed all output ripples into the
feedback pin and make sure the large time constant
assumption is satisfied. Typical choice of CFF is 1nF to
22nF if R1 and R2 are in kΩ range.
Step 2. Select RINJ according to the expected feedback
voltage ripple using Equation 22:
K DIV

ΔVFB(PP)
VIN

fSW  τ
D(1 D)
Eq. 22
Then the value of Rinj is obtained as:
RINJ

(R1//R2)

(
K
1
DIV
 1)
Eq. 23
Step 3. Select CINJ as 100nF, which could be considered
as short for a wide range of the frequencies.
Setting Output Voltage
The MIC28510 requires two resistors to set the output
voltage as shown in Figure 8.
Figure 8. Voltage–Divider Configuration
March 2012
21
M9999-030912-A