MIC2592B Datasheet, PDF (18/31 Pages) Micrel Semiconductor – Dual-Slot PCI Express Hot-Plug Controller

MIC2592B
outputs are independent of the MAIN outputs (12VIN[A/B]
and 3VIN[A/B]). Should the MAIN supply inputs move
below their respective UVLO thresholds, VAUX[A/B] will
still function as long as VSTBY[A/B] is present. Prior to
standby mode, ONA and ONB (or the Control Registers'
MAINA and MAINB bits) inputs should be deasserted or
the MIC2592B will assert /FAULT[A/B] and /INT (if inter-
rupts are enabled) output signals, if an undervoltage condi-
tion on the MAIN supply inputs is detected.
Circuit Breaker Function
The MIC2592B provides an electronic circuit breaker func-
tion that protects against excessive loads, such as short
circuits, at each supply. When the current from one or more
of a slot’s MAIN outputs exceeds the current limit threshold
(I_LIM = 50mV/R_SENSE) for a duration greater than t_FLT, the
circuit breaker is tripped and both MAIN supplies (all outputs
except VAUX[A/B]) are shut off. Should the load current cause
a MAIN output’s V_SENSE to exceed V_THFAST, the outputs are
immediately shut off with no delay. Undervoltage conditions
on the MAIN supply inputs also trip the circuit breaker, but
only when the MAIN outputs are enabled (to signal a supply
input brown-out condition).
The VAUX[A/B] outputs have a different circuit-breaker func-
tion. The VAUX[A/B] circuit breakers do not incorporate a
fast-trip detector, instead they regulate the output current into
a fault to avoid exceeding their operating current limit. The
circuit breaker will trip due to an overcurrent on VAUX[A/B]
when the fault timer expires. This use of the t_FLT timer pre-
vents the circuit breaker from tripping prematurely due to
brief current transients.
Following a fault condition, the outputs can be turned on
again via the ON inputs (if the fault occurred on one of the
MAIN outputs), via the AUXEN inputs (if the fault occurred
on the AUX outputs), or by cycling both ON and AUXEN (if
faults occurred on both the MAIN and AUX outputs). A fault
condition can alternatively be cleared under SMI control of
the ENABLE bits in the CNTRL[A/B] registers (see Register
Bits D[1:0]). When the circuit breaker trips, /FAULT[A/B] will
AUXEN[A/B]⁽¹⁾
VAUX[A/B] ⁽²⁾
3VAUX_UV[A/B] ⁽³⁾
ON[A/B]⁽¹⁾
MAIN[A/B]⁽⁴⁾
12VOUT_UV[A/B]⁽³⁾
3VOUT_UV[A/B]⁽³⁾
FORCE_ON[A/B]⁽¹⁾
FORCE_EN[A/B]⁽⁵⁾
Micrel
be asserted if the outputs were enabled through the Hot-Plug
Interface inputs. At the same time, /INT will be asserted (un-
less interrupts are masked). Note that /INT is deasserted by
writing a Logic 1 back into the respective fault bit position(s)
in the STAT[A/B] register or the Common Status Register.
The response time (t_FLT) of the MIC2592B’s primary overcur-
rent detector is set by external capacitors at the CFILTER[A/B]
pins to GND. For Slot A, CFILTER[A] is located at Pin 2; for
Slot B, CFILTER[B] is located at Pin 35. For a given response
time, the value for C_FILTER[A/B] is given by:
C_{FILTER[A /B]} F

t_{FLTA B}ms  I_FILTER  A
V_FILTER ^V^ 10³
where t_FLT[A/B] is the desired response time and quantities
I_FILTER and V_FILTER are specified in the MIC2592B’s “Electri-
cal Characteristics” table.
For applications that require a more accurate response
time for a given C_FILTER[A/B] tolerance, the MIC2592B
employs a patent-pending technique that improves re-
sponse time accuracy by more than a factor of two. A
110kΩ, 1% resistor connected from the MIC2592B’s
RFILTER[A&B] pin (Pin 20) to GND can be used. In this
case, the value for C_FILTER[A/B] for a desired response time
(t_FLT) is given by:
C_FILTER[A
/B]
F

t_FLT ms
R_FILTER[A&B]k 
 SF
where t_FLT is the desired response time, R_FILTER[A&B]
is 110kΩ, and “SF” is the CFILTER[A/B] response time
“Scaling Factor” in the “Electrical Characteristics” table.
V_STBY
4.99 k
/PWRGD[A/B]
March 2005
(1) _{External pin}
(2) _{CNTRL[A/B] Register Bit D[0]}
(3) _{Internal flag}
(4) _{CNTRL[A/B] Register Bit D[1]}
(5) _{CNTRL[A/B] Register Bit D[2]}
Figure 8. /PWRGD[A/B] Logic Diagram
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