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MLX92211 Datasheet, PDF (9/13 Pages) Melexis Microelectronic Systems – 3-Wire Hall Effect Latch
9 Application Information
9.1 Typical Three-Wire Application Circuit
MLX92211-AxA
3-Wire Hall Effect Latch
MLX92211
RPU
Notes:
1. For proper operation, a 10nF to 100nF bypass capacitor should
VCC
C1
10nF
VDD
OUT
10k
be placed as close as possible to the VDD and ground pin.
2. The pull-up resistor RPU value should be chosen in to limit the
VOUT current through the output pin below the maximum allowed
GND
continuous current for the device.
3. A capacitor connected to the output is not obligatory, because
the output slope is generated internally.
9.2 Automotive and Harsh, Noisy Environments Three-Wire Circuit
D1
R1
100 Ohms
VCC
Z1
C1
10nF
MLX92211
VDD
OUT
GND
RPU
10k
VOUT
C2
4.7nF
Notes:
1. For proper operation, a 10nF to 100nF bypass capacitor should be placed as close as possible to the VDD and ground pin.
2. The device could tolerate negative voltage down to -27V, so if negative transients over supply line VPEAK< -32V are expected, usage of the
diode D1 is recommended. Otherwise only R1 is sufficient.
When selecting the resistor R1, three points are important:
- the resistor has to limit IDD/IDDREV to 50mA maximum
- the resistor has to withstand the power dissipated in both over voltage conditions (VR12/R1)
- the resulting device supply voltage VDD has to be higher than VDD min (VDD = VCC – R1.IDD)
3. The device could tolerate positive supply voltage up to +27V (until the maximum power dissipation is not exceeded), so if positive
transients over supply line with VPEAK> 32V are expected, usage a zener diode Z1 is recommended. The R1-Z1 network should be sized to
limit the voltage over the device below the maximum allowed.
390109221101
Rev. 007
Page 9 of 13
www.melexis.com
Datasheet
Jan/15