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MLX81100_14 Datasheet, PDF (4/19 Pages) Melexis Microelectronic Systems – DC-Motor Controller
MLX81100
DC-Motor Controller
1. Functional Diagram
RTG
PS VDD5V
CLKO
VS
V1V8
SHNT_L
GND
GND
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
LIN
GND
5V/1.8V
Supply
Aux. Supply
SW2
Diff.
Amp
SW0
Diff.
BRMID1 Amp
SW1
Diff.
BRMID2 Amp
SW0 … SW7
LIN-
PHY
POR
Voltage
Monitor
Temp
MUX
Ref. Mux
10 bit ADC
I/O Register
VS/2
BRMID1
VS/2
BRMID2
VS/2
SW6
VS/2
SW7
Internal Communication Interface
RC-OSC.
300kHz
fRC
Reset
Pre-driver
Control
Internal Communication Interface
MelexCM
fPLL
PfPOfPrOSffrOOeSCfrOeSSCf,OseSCfC,OsSfC,/cOs2SfC/cO2SC/5ac2SC/5a61C/5la61/6l6e16e,l6re, r, r
DDDuuaualalClCoComommppaparaerere
116166bbbitititTTTIMIMIMEEERRR
Watchdog
DDuDuaualalClCCaapaptpututruerere
PWM Control
50Hz...100kHz
PWMO
CCCoomommppaparaerereoonon/no/o/fofffff
8w8w8iwtbihtbihtbihPtiPetiPetCreCiroCiroodioodoudrueruenrgengintsgitestiteseteertrerrrr
Interrrupt
Controller
fPLL
ddCdeCeClevolvolviodicdicdkcekekerrr
Appl. CPU
MLX16
Comm. CPU
MLX4
RAM
2kbyte
M
Flash
M
32kbyte
U
with ECC
EEPROM
128byte
UART
SPI
Analog
Watchdog
12V Ref
CP
Pre-
driver
High
Side 1
CP
Pre-
driver
High
Side 2
Pre-
driver
Low
Side 1
Pre-
driver
Low
Side 2
LIN-SBI
(1.3 and 2.0)
PLL
fPLL 30MHz
fOSC
fRC
External Communication Interface
Test
controller
Multi-
CPU
debugger
GND
CWD
VDRV
HSBC1
HS1
BRMID1
HSBC2
HS2
BRMID2
LS1
LS2
GND
IO0 IO1 IO2 IO3 IO4 IO5
Figure 1- Block diagram
TI0 TI1 TO
MLX81100 – Product Abstract
Page 4 of 19
June 2012
Rev 021