8408 Datasheet, PDF (7/20 Pages) Maxwell Technologies – Quad 8-Bit Multiplying CMOS D/A Converter with Memory

Quad 8-Bit Multiplying CMOS
D/A Converter with Memory
8408
CIRCUIT INFORMATION
The 8408 combines four identical 8-bit CMOS DACs onto a single monolithic chip. Each DAC has its own reference
input, feedback resistor, and on-board data latches. It also features a read/write function that serves as an accessible
memory location for digital-input data words. The DAC’s three-state readback drivers place the data word back onto
the data bus.
D/A CONVERTER SECTION
Each DAC contains a highly stable, silicon-chromium, thin-film, R-2R resistor ladder network and eight pairs of current
steering switches. These switches are in series with each ladder resistor and are single-pole, double-throw NMOS
transistors; the gates of these transistors are controlled by CMOS inverters. Figure 3 shows a simplified circuit of the
R-2R resistor ladder section, and Figure 4 shows an approximate equivalent switch circuit. The current through each
resistor leg is switched between IOUT 1 and IOUT 2. This maintains a constant current in each leg, regardless of the
digital input logic states.
Each transistor switch has a finite “ON” resistance that can introduce errors to the DAC’s specified performance.
These resistances must be accounted for by making the voltage drop across each transistor equal to each other. This
is done by binarily scaling the transistor’s “ON” resistance from the most significant bit (MSB) to the least significant bit
(LSB). With 10 volts applied at the reference input, the current through the MSB switch is 0.5 mA, the next bit is 0.25
mA, etc.; this maintains a constant 10 mV drop across each switch and the converter’s accuracy is maintained. It also
results in a constant resistance appearing at the DAC’s reference input terminal; this allows the DAC to be driven by a
voltage or current source, ac or dc, of positive or negative polarity.
Shown in Figure 5 is an equivalent output circuit for DAC A. The circuit is shown with all digital inputs high. The leak-
age current source is the combination of surface and junction leakages to the substrate. The 1/256 current source rep-
resents the constant 1-bit current drain through the ladder terminating resistor. The situation is reversed with all digital
inputs low, as shown in Figure 6. The output capacitance is code dependent, and therefore, is modulated between the
low and high values.
08.20.02 REV 1
All data sheets are subject to change without notice 7
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