8408 Datasheet, PDF (10/20 Pages) Maxwell Technologies – Quad 8-Bit Multiplying CMOS D/A Converter with Memory

Quad 8-Bit Multiplying CMOS
D/A Converter with Memory
8408
NTERFACE LOGIC SECTION
DAC Operating Modes
• All DACs in HOLD MODE.
• DAC A, B, C, or D individually selected (WRITE MODE).
• DAC A, B, C, or D individually selected (READ MODE).
• DACs A and C simultaneously selected (WRITE MODE).
• DACs B and D simultaneously selected (WRITE MODE).
DAC Selection: Control inputs, DS1, DS2, and A/B select which DAC can accept data from the input port (see Mode
Selection Table).
Mode Selection: Control inputs DS and R/W control the operating mode of the selected DAC.
Write Mode: When the control inputs DS and R/W are both low, the selected DAC is in the write mode. The input data
latches of the selected DAC are transparent, and its analog output responds to activity on the data inputs DB0–DB7.
Hold Mode: The selected DAC latch retains the data that was present on the bus line just prior to DS or R/W going to
a high state. All analog outputs remain at the values corresponding to the data in their respective latches.
Read Mode: When DS is low and R/W is high, the selected DAC is in the read mode, and the data held in the appro-
priate latch is put back onto the data bus.
08.20.02 REV 1
All data sheets are subject to change without notice 10
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