MAX15002 Datasheet, PDF (9/30 Pages) Maxim Integrated Products – Dual-Output Buck Controller with Tracking/Sequencing

Dual-Output Buck Controller with
Tracking/Sequencing
Pin Description
PIN
NAME
FUNCTION
1
REG
5V Regulator Output. Bypass with a 2.2µF ceramic capacitor to SGND.
Track/Sequence Select Input. At startup, connect SEL to REG to configure as a dual tracker or connect SEL
2
SEL
to SGND to configure as a dual sequencer. Note: When configured as a dual sequencer, each rail is
independently controlled by EN_.
Controller 1 Power-Ground Connection. Connect the input filter capacitor’s negative terminal, the source of
3
PGND1 the synchronous MOSFET, and the output filter capacitor’s return to PGND1. Connect externally to SGND at
a single point near the input capacitor return terminal.
4
DL1
Controller 1 Low-Side Gate Driver Output. DL1 is the gate driver output for the synchronous MOSFET.
5
DREG1
Controller 1 Low-Side Gate Driver Supply. Connect externally to REG and the anode of the boost diode.
Connect a minimum of 0.1µF ceramic capacitor from DREG1 to PGND1.
6
LX1
Controller 1 High-Side MOSFET Source Connection/Synchronous MOSFET Drain Connection. Connect the
inductor and the negative side of the boost capacitor to LX1.
7
DH1
Controller 1 High-Side Gate Driver Output. DH1 drives the gate of the high-side MOSFET.
8
BST1
Controller 1 High-Side Gate Driver Supply. Connect BST1 to the cathode of the boost diode and to the
positive terminal of the boost capacitor.
Controller 1 Negative Current-Sense Input. Connect CSN1 to the synchronous MOSFET drain (connected to
9
CSN1
LX1). When using a current-sense resistor, connect CSN1 to the junction of a low-side MOSFET’s source
and the current-sense resistor. See Figure 10.
Controller 1 Positive Current-Sense Input. Connect CSP1 to the synchronous MOSFET source (connected to
10
CSP1
PGND1). When using a current-sense resistor, connect CSP1 to the PGND1 end of the current-sense
resistor.
Controller 1 Valley Current-Limit Set Output. Connect a 25kΩ to 150kΩ resistor, R_ILIM1, from ILIM1 to SGND
11
ILIM1
to program the valley current-limit threshold from 50mV to 300mV. ILIM1 sources 20µA out to R_ILIM1. The
resulting voltage divided by 10 is the valley current-limit threshold. When using a precision current-sense
resistor, connect a resistive divider from REG to ILIM1 to SGND to set the valley current limit. See Figure 10.
12
COMP1
Controller1 Error Transconductance Amplifier Output. Connect COMP1 to the compensation feedback
network.
Controller 1 Enable Input. EN1 must be above 1.24V, V_EN-TH, for the PWM controller to start Output 1.
13
EN1
Controller 1 is the master. Use the master as the highest output voltage in a coincident tracking
configuration.
Controller 1 Feedback Regulation Point. Connect to the center tap of a resistive divider from the converter
14
FB1
output to SGND to set the output voltage. The FB1 voltage regulates to V_FB (0.6V).
15
PGOOD1 ^{Controller 1 Power-Good Output. Open-drain PGOOD1 output goes high impedance (releases) when FB1 is}
above 0.925 x V_FB (0.555V).
Controller 2 Power Ground Connection. Connect the input filter capacitor’s negative terminal, the source of
16
PGND2 the synchronous MOSFET, and the output filter capacitor’s return to PGND2. Connect externally to SGND at
a single point near the input capacitor return terminal.
17
DL2
Controller 2 Low-Side Gate Driver Output. DL2 is the gate driver output for the synchronous MOSFET.
18
DREG2
Controller 2 Low-Side Gate Driver Supply. Connect externally to REG and the anode of the boost diode.
Connect a minimum of a 0.1µF ceramic capacitor from DREG2 to PGND2.
19
LX2
Controller 2 High-Side MOSFET Source Connection/Synchronous MOSFET Drain Connection. Connect the
inductor and the negative side of the boost capacitor to LX2.
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