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MAX15002 Datasheet, PDF (22/30 Pages) Maxim Integrated Products – Dual-Output Buck Controller with Tracking/Sequencing
Dual-Output Buck Controller with
Tracking/Sequencing
Type III: Compensation when fCO < fESR
As indicated above, the position of the output capaci-
tor’s inherent ESR zero is critical in designing an appro-
priate compensation network. When low-ESR ceramic
output capacitors are used, the ESR zero frequency
(fESR) is usually much higher than unity crossover fre-
quency (fCO). In this case, a Type III compensation net-
work is recommended (see Figure 7a).
VOUT
CCF
RI R1
CI
R2
RF
CF
FB
-
gM
VREF +
COMP
Figure 7a. Type III Compensation Network
GAIN
(dB)
3RD ASYMPTOTE
ωRFCI
1ST ASYMPTOTE
ωRICF-1
2ND ASYMPTOTE
RFRI-1
4TH ASYMPTOTE
RFRIC
5TH ASYMPTOTE
ωRICCF-1
1ST POLE
(AT ORIGIN)
1ST ZERO
2ND POLE
RFCF
RICI
2ND ZERO
RICI
3RD POLE ω (rad/sec)
RFCCF
Figure 7b. Type III Compensation Network Response
As shown in Figure 7b, the Type III compensation net-
work introduces two zeros and three poles into the con-
trol loop. The error amplifier has a low-frequency pole
at the origin, two zeros, and two higher frequency poles
at the following frequencies:
fZ1
=
2π
1
× RF
×
CF
fZ2
=
2π
×
CI
1
× (R1
+
RI)
Two midband zeros (fZ1 and fZ2) are designed to can-
cel the pair of complex poles introduced by the LC filter.
fP1 = at the origin (0Hz)
fP1 introduces a pole at zero frequency (integrator) for
nulling DC output-voltage errors.
fP2
=
2π
1
× RI
×
CI
Depending on the location of the ESR zero (fESR), fP2
can be used to cancel it, or to provide additional atten-
uation of the high-frequency output ripple.
( ) fP3
=
2π
× RF
×
1
CF
||
CCF
=
2π
× RF
1
× CF
CF
× CCF
+ CCF
fP3 attenuates the high-frequency output ripple.
The locations of the zeros and poles should be such
that the phase margin peaks around fCO.
Set the ratios of fCO-to-fZ and fP-to-fCO equal to one
another, e.g., fCO = fP = 5 is a good number to get about
fZ fCO
60° of phase margin at fCO. Whichever technique, it is
important to place the two zeros at or below the double
pole to avoid the conditional stability issue.
The following procedure is recommended:
1) Select a crossover frequency, fCO, at or below one-
tenth the switching frequency:
fCO
≤ fSW
10
2) Calculate the LC double-pole frequency, fLC :
fLC
=
2π×
1
L × COUT
3)
4)
Select RF ≥ 10kΩ.
Place compensator’s first zero
at or below the output filter’s
fZ1
=
2π
1
× RF
× CF
double pole, fLC, as follows:
CF
=
2π
× RF
1
× 0.5
×
fLC
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