MAX15002 Datasheet, PDF (10/30 Pages) Maxim Integrated Products – Dual-Output Buck Controller with Tracking/Sequencing

Dual-Output Buck Controller with
Tracking/Sequencing
Pin Description (continued)
PIN
NAME
FUNCTION
20
DH2
Controller 2 High-Side Gate Driver Output. DH2 drives the gate of the high-side MOSFET.
21
BST2
Controller 2 High-Side Gate Driver Supply. Connect BST2 to the cathode of the boost diode and to the
positive terminal of the boost capacitor.
Controller 2 Negative Current-Sense Input. Connect CSN2 to the synchronous MOSFET drain (connected to
22
CSN2
LX2). When using a current-sense resistor, connect CSN2 to the junction of the low-side MOSFET’s source
and the current-sense resistor. See Figure 10.
Controller 2 Positive Current-Sense Input. Connect CSP2 to the synchronous MOSFET source (connected to
23
CSP2
PGND2). When using a current-sense resistor, connect CSP2 to the PGND2 end of the current-sense
resistor.
Controller 2 Valley Current-Limit Set Output. Connect a 25kΩ to 150kΩ resistor, R_ILIM2, from ILIM2 to SGND
24
ILIM2
to program the valley current-limit threshold from 50mV to 300mV. ILIM2 sources 20µA out to R_ILIM2. The
resulting voltage divided by 10 is the valley current-limit threshold. When using a precision current-sense
resistor, connect a resistive divider from REG to ILIM2 to SGND to set the valley current limit. See Figure 10.
25
COMP2 ^{Controller 2 Error Transconductance Amplifier Output. Connect COMP2 to the compensation feedback}
network.
Controller 2 Enable/Tracking Input. See Figure 2.
When sequencing, EN/TRACK2 must be above 1.24V for the PWM controller 2 to start.
26 EN/TRACK2 Coincident tracking—connect the same resistive divider used for FB2, from Output 1 to EN/TRACK2 to
SGND.
Ratiometric tracking—connect EN/TRACK2 to analog ground.
27
28
29–33
34
35
36
37
38
39
40
—
FB2
PGOOD2
N.C.
SYNC
SGND
RT
PHASE
RESET
CT
IN
EP
Controller 2 Feedback Regulation Point. Connect to the center tap of a resistive divider from the converter
output to SGND to set the output voltage. The FB2 voltage regulates to V_FB (0.6V).
Controller 2 Power-Good Output. Open-drain PGOOD2 output goes high impedance (releases) when FB2 is
above 0.925 x V_FB (0.555V).
No Connection. Not internally connected.
Synchronization Input. Drive with a frequency at least 20% higher than two times the frequency
programmed using the RT pin. The switching frequency is 1/2 the SYNC frequency. Connect SYNC to
SGND when not used.
Analog Ground Connection. Connect SGND and PGND_ together at one point near the input bypass
capacitor return terminal.
Oscillator Timing Resistor Connection. Connect a 750kΩ to 68kΩ resistor from RT to SGND to program the
switching frequency from 200kHz to 2.2MHz.
Phase Select Input. Connect PHASE to SGND for 180° out-of-phase operation between the controllers.
Connect to REG for in phase operation.
RESET Output. Open-drain RESET output releases after all PGOODs are released and timeout programmed
by CT finishes.
RESET Timeout Capacitor Connection. Connect a timing capacitor from CT to analog ground to set the
RESET delay. CT sources 2µA into the timing capacitor. When the voltage at CT passes 2V, open-drain
RESET goes high impedance.
Supply Input Connection. Connect to an external voltage source from 5.5V to 23V. For 4.5V to 5.5V input
application, connect IN and REG together.
Exposed Pad. Solder the exposed pad to a large SGND plane.
10 ______________________________________________________________________________________