MAX11661_1111 Datasheet, PDF (8/28 Pages) Maxim Integrated Products – 500ksps, Low-Power, Serial 12-/10-/8-Bit ADCs

500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11664) (continued)
(VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD, fSCLK = 8MHz, 50% duty cycle, 500ksps; CDOUT = 10pF, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
POWER SUPPLY
Positive Supply Voltage
Digital I/O Supply Voltage
Positive Supply Current
(Full-Power Mode)
Positive Supply Current
(Full-Power Mode), No Clock
SYMBOL
CONDITIONS
VDD
VOVDD
IVDD
IOVDD
IVDD
VAIN_ = VGND
VAIN_ = VGND
MIN TYP MAX UNITS
2.2
3.6
V
1.5
VDD
V
1.67
mA
0.1
1.5
mA
Power-Down Current
IPD
Line Rejection
TIMING CHARACTERISTICS (Note 2)
Quiet Time
tQ
CS Pulse Width
t1
CS Fall to SCLK Setup
t2
CS Falling Until DOUT High-
Impedance Disabled
t3
Data Access Time After SCLK
Falling Edge (Figure 2)
t4
SCLK Pulse Width Low
t5
SCLK Pulse Width High
t6
Data Hold Time From SCLK
Falling Edge
t7
Leakage only
VDD = 2.2V to 3.6V, VREF = 2.2V
(Note 3)
(Note 3)
(Note 3)
(Note 3)
VOVDD = 2.2V to 3.6V
VOVDD = 1.5V to 2.2V
Percentage of clock period (Note 3)
Percentage of clock period (Note 3)
Figure 3
1.3
10
FA
0.17
LSB/V
4
ns
10
ns
5
ns
1
ns
15
ns
16.5
40
60
%
40
60
%
5
ns
SCLK Falling Until DOUT High
Impedance
t8
Figure 4 (Note 3)
2.5
14
ns
Power-Up Time
Conversion cycle (Note 3)
1
Cycle
ELECTRICAL CHARACTERISTICS (MAX11663)
(VDD = 2.2V to 3.6V. fSCLK = 8MHz, 50% duty cycle, 500ksps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical
values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
DC ACCURACY
Resolution
10
Bits
Integral Nonlinearity
INL
Q0.5 LSB
Differential Nonlinearity
Offset Error
DNL
OE
No missing codes
Q0.5 LSB
Q0.3 Q1.3 LSB
Gain Error
Total Unadjusted Error
GE
Excluding offset and reference errors
TUE
Q0.15 Q1.3 LSB
Q1
LSB
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