MAX11661_1111 Datasheet, PDF (4/28 Pages) Maxim Integrated Products – 500ksps, Low-Power, Serial 12-/10-/8-Bit ADCs

500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11666) (continued)
(VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD. fSCLK = 8MHz, 50% duty cycle, 500ksps. CDOUT = 10pF, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
POWER SUPPLY
Positive Supply Voltage
Digital I/O Supply Voltage
Positive Supply Current
(Full-Power Mode)
VDD
VOVDD
IVDD
IOVDD
VAIN_ = VGND
VAIN_ = VGND
2.2
3.6
V
1.5
VDD
V
1.67
mA
0.1
Positive Supply Current (Full-
Power Mode), No Clock
IVDD
1.5
mA
Power-Down Current
IPD
Line Rejection
TIMING CHARACTERISTICS (Note 2)
Leakage only
VDD = 2.2V to 3.6V, VREF = 2.2V
1.3
10
FA
0.7
LSB/V
Quiet Time
tQ
(Note 3)
4
CS Pulse Width
t1
(Note 3)
10
CS Fall to SCLK Setup
t2
(Note 3)
5
CS Falling Until DOUT High-
Impedance Disabled
t3
(Note 3)
1
Data Access Time After SCLK
Falling Edge
t4
Figure 2, VOVDD = 2.2V to 3.6V
Figure 2, VOVDD = 1.5V to 2.2V
SCLK Pulse Width Low
t5
Percentage of clock period (Note 3)
40
SCLK Pulse Width High
t6
Percentage of clock period (Note 3)
40
Data Hold Time From SCLK
Falling Edge
t7
Figure 3
5
SCLK Falling Until DOUT High
Impedance
t8
Figure 4 (Note 3)
2.5
ns
ns
ns
ns
15
ns
16.5
60
%
60
%
ns
14
ns
Power-Up Time
Conversion cycle (Note 3)
1
Cycle
ELECTRICAL CHARACTERISTICS (MAX11665)
(VDD = 2.2V to 3.6V, fSCLK = 8MHz, 50% duty cycle, 500ksps, CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical
values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
DC ACCURACY
Resolution
12
Bits
Integral Nonlinearity
INL
Q1
LSB
Differential Nonlinearity
DNL No missing codes
Q1
LSB
Offset Error
OE
Q1.5 Q4
LSB
Gain Error
GE
Excluding offset and reference errors
Q1
Q3
LSB
Total Unadjusted Error
TUE
Q1.5
LSB
DYNAMIC PERFORMANCE (fAIN = 250kHz)
Signal-to-Noise and Distortion
SINAD
70
72.5
dB
Signal-to-Noise Ratio
SNR
70.5
73
dB
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