DS1678 Datasheet, PDF (8/25 Pages) Maxim Integrated Products – Real-Time Event Recorder

DS1678 Real-Time Event Recorder
POWER CONTROL
The device is fully accessible and data can be written and read when V_CC is greater than V_PF. However,
when V_CC falls below V_PF, the internal registers are blocked from any access. The device power is
switched from V_CC to V_BAT when V_CC drops below V_BAT. Operation, except for the I²C interface, is
maintained from the V_BAT source until V_CC is returned to nominal levels (Table 1). After V_CC returns
above V_PF, read and write access is allowed.
Table 1. Power Control
SUPPLY
CONDITION
V_CC < V_PF, V_CC < V_BAT
V_CC < V_PF, V_CC > V_BAT
V_CC > V_PF, V_CC > V_BAT
READ/WRITE
ACCESS
No
No
Yes
POWERED
BY
V_BAT
V_CC
V_CC
OSCILLATOR CIRCUIT
The DS1678 uses an external 32.768kHz crystal. The oscillator circuit does not require any external
resistors or capacitors (C_L) to operate. Table 2 specifies several crystal parameters for the external crystal,
and the oscillator block in the Block Diagram shows a functional schematic of the oscillator circuit. Using
a crystal with the specified characteristics, the startup time is usually less than one second.
Table 2. Crystal Specifications*
PARAMETER SYMBOL MIN TYP MAX UNITS
Nominal Frequency
f_O
Series Resistance
ESR
32.768
kHz
45
kΩ
Load Capacitance
C_L
12.5
pF
*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Figure 1 shows a
typical PC board layout for crystal and oscillator isolation from noise. Refer to Application Note 58:
Crystal Considerations with Dallas Real-Time Clocks for detailed information.
Figure 1. Typical Crystal Layout
LOCAL GROUND PLANE (LAYER 2)
X1
CRYSTAL
X2
GND
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