DS1371 Datasheet, PDF (8/14 Pages) Maxim Integrated Products – 2-Wire, 32-Bit Binary Counter Watchdog Clock

DS1371
Address Map
Table 2 shows the address map for the registers of the DS1371. During a multibyte access, when the
address pointer reaches the end of the register space (08h), it wraps around to location 00h. On a 2-wire
START, STOP, or address pointer incrementing to location 00h, the current time is transferred to a
second set of registers. The time information is read from these secondary registers, while the clock may
continue to run. This eliminates the need to reread the registers in case of an update of the main registers
during a read.
Table 2. Address Map
ADDRESS BIT 7
BIT 6
00H
BIT 5 BIT 4 BIT 3 BIT 2
TOD COUNTER BYTE 0
BIT 1
01H
TOD COUNTER BYTE 1
02H
TOD COUNTER BYTE 2
03H
TOD COUNTER BYTE 3
04H
WD/ALM COUNTER BYTE 0
05H
WD/ALM COUNTER BYTE 1
06H
WD/ALM COUNTER BYTE 2
07H
EOSC
WACE
WD/
ALM
0 INTCN RS2
RS1
08H
OSF
0
0
0
0
0
0
Note: Unless otherwise specified, the state of the registers are not defined when power is first applied.
BIT 0
AIE
AF
FUNCTION
Time-of-Day
Counter
Time-of-Day
Counter
Time-of-Day
Counter
Time-of-Day
Counter
Watchdog/Alarm
Counter
Watchdog/Alarm
Counter
Watchdog/Alarm
Counter
Control
Status
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