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MAX11329 Datasheet, PDF (7/37 Pages) Maxim Integrated Products – 3Msps, 12-/10-Bit, 8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access
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MAX11329–MAX11332
3Msps, 12-/10-Bit, 8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
ELECTRICAL CHARACTERISTICS (MAX11329/MAX11330) (continued)
(VDD = 2.35V to 3.6V, VOVDD = 1.5V to 3.6V, fSAMPLE = 3Msps, fSCLK = 48MHz, 50% duty cycle, VREF+ = VDD, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
Input Hysteresis
VHYST
Input Leakage Current
IIN
Input Capacitance
CIN
DIGITAL OUTPUTS (DOUT, EOC)
VAIN_ = 0V or VDD
Output Voltage Low
VOL ISINK = 200FA
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Positive Supply Voltage
Digital I/O Supply Voltage
Positive Supply Current
VOH
IL
COUT
ISOURCE = 200FA
CS = VDD
CS = VDD
VDD
VOVDD
IDD
fSAMPLE = 3Msps
fSAMPLE = 0Msps (3Msps devices)
Full shutdown
MIN TYP MAX UNITS
VOVDD
O 0.15
mV
±0.09 ±1.0
FA
3
pF
VOVDD
O 0.15
V
VOVDD
O 0.85
V
-0.3 ±1.5
FA
4
pF
2.35 3.0
3.6
V
1.5
3.0
3.6
V
5.1
6.5
2.5
mA
0.0013 0.006
Power Dissipation
Normal mode
(external
reference)
AutoStandby
VDD = 3V,
fSAMPLE = 3Msps
VDD = 2.35V,
fSAMPLE = 3Msps
VDD = 3V,
fSAMPLE = 3Msps
VDD = 2.35V,
fSAMPLE = 3Msps
Full/
AutoShutdown
TIMING CHARACTERISTICS (Figure 1) (Note 11)
VDD = 3V
VDD = 2.35V
SCLK Clock Period
tCP Externally clocked conversion
SCLK Duty Cycle
tCH
SCLK Fall to DOUT Transition
tDOT
CLOAD =
10pF
VOVDD = 1.5V to 2.35V
VOVDD = 2.35V to 3.6V
16th SCLK Fall to DOUT Disable
tDOD CLOAD = 10pF, channel ID on
14th SCLK Fall to DOUT Disable
CLOAD = 10pF, channel ID off
SCLK Fall to DOUT Enable
tDOE CLOAD = 10pF
DIN to SCLK Rise Setup
tDS
15.2
10.3
mW
7.3
4.35
3.9
FW
1.7
20.8
ns
40
60
%
4
16.5
ns
4
15
15
ns
16
ns
14
ns
4
ns
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