MAX1020_12 Datasheet, PDF (7/44 Pages) Maxim Integrated Products – 10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports

10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
ELECTRICAL CHARACTERISTICS (continued)
(V_AVDD = V_DVDD = 2.7V to 3.6V (MAX1057), external reference V_REF = 2.5V (MAX1057), V_AVDD = V_DVDD = 4.75V to 5.25V
(MAX1020/MAX1022/MAX1058), external reference V_REF = 4.096V (MAX1020/MAX1022/MAX1058), f_CLK = 3.6MHz (50% duty cycle),
T_A = -40°C to +85°C, unless otherwise noted. Typical values are at V_AVDD = V_DVDD = 3V (MAX1057), V_AVDD = V_DVDD = 5V
(MAX1020/MAX1022/MAX1058), T_A = +25°C. Outputs are unloaded, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
ADC Positive-Supply Rejection
PSRA
Full-
scale
input
MAX1057, V_AVDD = 2.7V to
MAX1020/MAX1022/MAX1058,
V_AVDD = 4.75V to 5.25V
TIMING CHARACTERISTICS (Figures 6–13)
SCLK Clock Period
t_CP
SCLK Pulse-Width High
SCLK Pulse-Width Low
t_CH 40/60 duty cycle
t_CL 60/40 duty cycle
GPIO Output Rise/Fall After
CS Rise
t_GOD C_LOAD = 20pF
GPIO Input Setup Before CS Fall
LDAC Pulse Width
SCLK Fall to DOUT Transition
(Note 16)
SCLK Rise to DOUT Transition
(Notes 16, 17)
CS Fall to SCLK Fall Setup Time
SCLK Fall to CS Rise Setup Time
DIN to SCLK Fall Setup Time
t_GSU
t_LDACPWL
t_DOT
t_DOT
t_CSS
t_CSH
t_DS
C_LOAD = 20pF, SLOW = 0
C_LOAD = 20pF, SLOW = 1
C_LOAD = 20pF, SLOW = 0
C_LOAD = 20pF, SLOW = 1
DIN to SCLK Fall Hold Time
CS Pulse-Width High
CS Rise to DOUT Disable
CS Fall to DOUT Enable
EOC Fall to CS Fall
t_DH
t_CSPWH
t_DOD
t_DOE
t_RDS
C_LOAD = 20pF
C_LOAD = 20pF
CKSEL = 01 (temp sense) or CKSEL =
10 (temp sense), internal reference on
MIN
TYP MAX UNITS
±0.06 ±0.5
mV
±0.06 ±0.5
40
ns
16
ns
16
ns
100
ns
0
ns
20
ns
1.8
12.0
ns
10
40
1.8
12.0
ns
10
40
10
ns
0
ns
10
ns
0
2000
ns
50
ns
25
ns
1.5
25.0
ns
30
ns
65
CS or CNVST Rise to EOC
Fall—Internally Clocked
Conversion Time
t_DOV
CKSEL = 01 (temp sense) or CKSEL =
10 (temp sense), internal reference
initially off
CKSEL = 01 (voltage conversion)
CKSEL = 10 (voltage conversion),
internal reference on
140
9
µs
9
CKSEL = 10 (voltage conversion),
80
internal reference initially off
CNVST Pulse Width
CKSEL = 00, CKSEL = 01 (temp sense)
40
t_{CSW CKSEL = 01 (voltage conversion)}
1.4
ns
µs
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