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MAX1020_12 Datasheet, PDF (40/44 Pages) Maxim Integrated Products – 10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports
10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
CS
tGOD
GPIO INPUT/OUTPUT
tGSU
Figure 13. GPIO Timing
LDAC
OUT_
tLDACPWL
tS
±1 LSB
Figure 14. LDAC Functionality
LDAC Functionality
Drive LDAC low to transfer the content of the input reg-
isters to the DAC registers. Drive LDAC permanently
low to make the DAC register transparent. The DAC
output typically settles from zero to full scale within ±1
LSB after 2µs. See Figure 14.
Layout, Grounding, and Bypassing
For best performance, use PC boards. Ensure that digi-
tal and analog signal lines are separated from each
other. Do not run analog and digital signals parallel to
one another (especially clock signals) or do not run dig-
ital lines underneath the MAX1020/MAX1022/
MAX1057/MAX1058 package. High-frequency noise in
the AVDD power supply may affect performance.
Bypass the AVDD supply with a 0.1µF capacitor to
AGND, close to the AVDD pin. Bypass the DVDD sup-
ply with a 0.1µF capacitor to DGND, close to the DVDD
pin. Minimize capacitor lead lengths for best supply-
noise rejection. If the power supply is very noisy, con-
nect a 10Ω resistor in series with the supply to improve
power-supply filtering.
The MAX1020/MAX1022/MAX1057/MAX1058 TQFN
packages contain an exposed pad on the underside of
the device. Connect this exposed pad to AGND. Refer to
the MAX1258EVKIT for an example of proper layout.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. INL for
the MAX1020/MAX1022/MAX1057/MAX1058 is mea-
sured using the end-point method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A
DNL error specification of less than 1 LSB guarantees
no missing codes and a monotonic transfer function.
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