Z86L81 Datasheet, PDF (59/88 Pages) Maxim Integrated Products – 28-Pin Low-Voltage Infrared Microcontrollers

Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
53
HALT
HALT turns off the internal CPU clock, but not the XTAL oscillation. The counter/
timers and external interrupts IRQ0, IRQ1, IRQ2, IRQ3, and IRQ4 remain active.
The devices are recovered by interrupts, either externally or internally generated.
An interrupt request must be executed (enabled) to exit HALT Mode. After the
interrupt service routine, the program continues from the instruction after the
HALT.
STOP
This instruction turns off the internal clock and external crystal oscillation, thereby
reducing the standby current to 10 A or less. STOP Mode is terminated only by a
reset (such as WDT timeout), POR, SMR, or external reset. This termination
causes the processor to restart the application program at address 000Ch. In
order to enter STOP (or HALT) mode, first flush the instruction pipeline to avoid
suspending execution in mid-instruction. Execute a NOP (Op Code = FFh) imme-
diately before the appropriate sleep instruction, as follows:
FF
NOP
; clear the pipeline
6F
STOP
; enter STOP Mode
or
FF
NOP
; clear the pipeline
7F
HALT
; enter HALT Mode
Port Configuration Register (PCON)
The PCON register (Figure 28) configures the comparator output on Port 3. It is
located in the expanded register 2 at Bank F, location 00.
19-4615; Rev 0; 4/09