Z86L81 Datasheet, PDF (56/88 Pages) Maxim Integrated Products – 28-Pin Low-Voltage Infrared Microcontrollers

Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
50
Table 14. Interrupt Types, Sources, and Vectors
Name
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
Source
P32
P33
P31, T_IN
T16
T8
LVD
Vector Location Comments
0,1
External (P32), Rising Falling Edge
Triggered
2,3
External (P33), Falling Edge Triggered
4,5
External (P31), Rising Falling Edge
Triggered
6,7
Internal
8,9
Internal
10,11
Internal
When more than one interrupt is pending, priorities are resolved by a programma-
ble priority encoder controlled by the Interrupt Priority Register. An interrupt
machine cycle is activated when an interrupt request is granted. As a result, all
subsequent interrupts are disabled, and the Program Counter and Status Flags
are saved. The cycle then branches to the program memory vector location
reserved for that interrupt. All Z86L81/86/98 interrupts are vectored through loca-
tions in the program memory. This memory location, and the next byte, contain the
16-bit address of the interrupt service routine for that particular interrupt request.
To accommodate polled interrupt systems, interrupt inputs are masked, and the
Interrupt Request register is polled to determine which of the interrupt requests
require service.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 may be rising, falling, or both edge
triggered; all are programmable by the user. The software can poll to identify the
state of the pin.
Programming bits for the Interrupt Edge Select are located in the IRQ Register
(R250), bits D7 and D6. The configuration is indicated in Table 15.
Table 15. IRQ Register*
IRQ
D7
D6
0
0
0
1
1
0
Interrupt Edge
IRQ2(P31)
F
F
R
IRQ0 (P32)
F
R
F
19-4615; Rev 0; 4/09