DS3170_11 Datasheet, PDF (49/230 Pages) Maxim Integrated Products – DS3/E3 Single-Chip Transceiver Single-Chip Transceiver for DS3 and E3

Figure 8-33. Clear Status Latched Register on Read
A[0]/BSWAP
A[10:1]
D[15:0]
CS
WR
RD
RDY
Z
0x1C0
0xFFFF
0x1C0
0x0000
Z
Z
DS3170 DS3/E3 Single-Chip Transceiver
Z
Figure 8-34. Clear Status Latched Register on Write
A[0]/BSWAP
A[10:1]
D[15:0]
CS
WR
RD
RDY
Z
0x1C0
0xFFFF
0x1C0
0x5555
Z
Z
0x1C0
0xAAAA
Z
Z
Z
Figure 8-35 and Figure 8-36 show exaggerated views of the Ready Signal to describe the difference in access
times to write or read to or from various memory locations on the DS3170 device. Some registers will have a faster
access time than others and if needed, the user can implement the RDY signal to maximize efficiency of read and
write accesses.
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