MAX16047 Datasheet, PDF (47/62 Pages) Maxim Integrated Products – 12-Channel/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers

12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Command Codes
The MAX16047/MAX16049 use eight command codes
for block read, block write, and other commands. See
Table 26 for a list of command codes.
To initiate a software reboot, send 96h using the send
byte format. A software-initiated reboot is functionally the
same as a hardware-initiated power-on reset. During
boot-up, EEPROM configuration data in the range of 0Fh
to 7Dh is copied to the same register addresses in the
default page.
Send command code 97h to trigger a fault store to
EEPROM. Configure the Critical Fault Log Control register
(r47h) to store ADC conversion results and/or fault flags
in registers once the command code has been sent.
Using command code 98h allows access to the extend-
ed page, which contains registers for ADC conversion
results, and GPIO input/output data. Use command
code 99h to return to the default page.
Send command code 9Ah to access the EEPROM
page. Once command code 9Ah has been sent, all
addresses are recognized as EEPROM addresses only.
Send command code 9Bh to return to the default page.
Table 26. Command Codes
COMMAND CODE
ACTION
94h
Write Block
95h
Read Block
96h
Reboot EEPROM in Register File
97h
Trigger Fault Store to EEPROM
98h
Extended Page Access On
99h
Extended Page Access Off
9Ah
EEPROM Page Access On
9Bh
EEPROM Page Access Off
Block Write
The block write protocol (see Figure 12) allows the
master device to write a block of data (1 byte to 16
bytes) to memory. The destination address should be
preloaded by a previous send byte command; other-
wise the block write command begins to write at the
current address pointer. After the last byte is written,
the address pointer remains preset to the next valid
address. If the number of bytes to be written causes
the address pointer to exceed FFh for EEPROM or 7Dh
for configuration registers, the address pointer stays at
FFh or 7Dh, overwriting this memory address with the
remaining bytes of data. The last data byte sent is
stored at register address FFh. The slave generates a
NACK at step 5 if the command code is invalid or if the
device is busy, and the address pointer is not altered.
The block write procedure is the following:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends the 8-bit command code for
block write (94h).
5) The addressed slave asserts an ACK on SDA.
6) The master sends the 8-bit byte count (1 byte to 16
bytes), n.
7) The addressed slave asserts an ACK on SDA.
8) The master sends 8 bits of data.
9) The addressed slave asserts an ACK on SDA.
10) Repeat steps 8 and 9 n - 1 times.
11) The master sends a STOP condition.
Block Read
The block read protocol (see Figure 12) allows the
master device to read a block of up to 16 bytes from
memory. Read fewer than 16 bytes of data by issuing
an early STOP condition from the master, or by gener-
ating a NACK with the master. The destination address
should be preloaded by a previous send byte com-
mand; otherwise the block read command begins to
read at the current address pointer. If the number of
bytes to be read causes the address pointer to exceed
FFh for the configuration register or EEPROM, the
address pointer stays at FFh and the last data byte
read is from register rFFh. The block read procedure is
the following:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends 8 bits of the block read com-
mand (95h).
5) The slave asserts an ACK on SDA, unless busy.
6) The master generates a REPEATED START condition.
7) The master sends the 7-bit slave address and a
read bit (high).
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