DS3181 Datasheet, PDF (40/389 Pages) Maxim Integrated Products – Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU

DS3181/DS3182/DS3183/DS3184
7.3 UNI Line Interface Mode
This mode is valid for all framing modes, providing a digital NRZ input/output on RDATn and TDATn and clocked
by RLCLKn and TLCLKn. The B3ZS/HDB3 decoder/encoder block is disabled except for the BPV counter, which is
used to count RLCV errors.
Table 7-3. UNI Line Interface Mode Configuration Registers
MODE
Unipolar Mode
LM[2:0]
1XX
LINE.TCR.TZSD
AND
LINE.RCR.RZSD
X
TLEN
PORT.CR2
1
Figure 7-3. UNI Line Interface Mode
TDATn
TLCLKn
TUA1
FROM FRAMING LOGIC
OR EXTERNAL PINS
RLCLKn
RDATn
Clock Rate
Adapter
TO FRAMING LOGIC
OR EXTERNAL PINS
n = port #
(1-4)
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