MAX1214N Datasheet, PDF (4/21 Pages) Maxim Integrated Products – 1.8V, Low-Power, 12-Bit, 210Msps ADC for Broadband Applications

1.8V, Low-Power, 12-Bit, 210Msps
ADC for Broadband Applications
ELECTRICAL CHARACTERISTICS (continued)
(AV_CC = OV_CC = 1.8V, AGND = OGND = 0, f_SAMPLE = 210MHz, differential clock input drive, 0.1µF capacitor on REFIO, internal ref-
erence, digital output pins differential R_L = 100Ω. Limits are for T_A = -40°C to +85°C, unless otherwise noted. Typical values are at
T_A = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP MAX UNITS
LVCMOS DIGITAL INPUTS (CLKDIV, T/B)
Digital Input-Voltage Low
V_IL
Digital Input-Voltage High
V_IH
TIMING CHARACTERISTICS
0.2 x AV_CC V
0.8 x AV_CC
V
CLK-to-Data Propagation Delay
CLK-to-DCLK Propagation Delay
t_PDL
t_CPDL
Figure 5
Figure 5
2.05
ns
3.95
ns
DCLK-to-Data Propagation Delay
LVDS Output Rise Time
LVDS Output Fall Time
t_CPDL - t_PDL Figure 5 (Note 3)
t_RISE
20% to 80%, C_L = 5pF
t_FALL 20% to 80%, C_L = 5pF
1.8
1.9
2.0
ns
450
ps
450
ps
Output Data Pipeline Delay
t_LATENCY Figure 5
11
Clock
cycles
POWER REQUIREMENTS
Analog Supply Voltage Range
Digital Supply Voltage Range
Analog Supply Current
Digital Supply Current
Analog Power Dissipation
Power-Supply Rejection Ratio
(Note 4)
AV_CC
OV_CC
I_AVCC
I_OVCC
P_DISS
PSRR
f_IN = 100MHz
f_IN = 100MHz
f_IN = 100MHz
Offset
Gain
1.70 1.80 1.90
V
1.70 1.80 1.90
V
379
410
mA
65
71
mA
799
866
mW
1.8
mV/V
1.5
%FS/V
Note 1: Values at T_A ≥ +25°C guaranteed by production test, values at T_A < +25°C guaranteed by design and characterization.
Note 2: Static linearity and offset parameters are computed from an end-point curve fit.
Note 3: Parameter guaranteed by design and characterization: T_A = -40°C to +85°C.
Note 4: PSRR is measured with both analog and digital supplies connected to the same potential.
4 _______________________________________________________________________________________