MAX1214N Datasheet, PDF (16/21 Pages) Maxim Integrated Products – 1.8V, Low-Power, 12-Bit, 210Msps ADC for Broadband Applications

1.8V, Low-Power, 12-Bit, 210Msps
ADC for Broadband Applications
each of the ADC inputs only requires half the signal
swing compared to a single-ended configuration.
Wideband RF transformers provide an excellent solu-
tion to convert a single-ended signal to a fully differen-
tial signal, required by the MAX1214N to reach its
optimum dynamic performance. Apply a secondary-
side termination of a 1:1 transformer (e.g., Mini-Circuit’s
ADT1-1WT) into two separate 24.9Ω resistors. Higher
source impedance values can be used at the expense
of degradation in dynamic performance. This configu-
ration optimizes THD and SFDR performance of the
ADC by reducing the effects of transformer parasitics.
However, the source impedance combined with the
shunt capacitance provided by a PC board and the
ADC’s parasitic capacitance limit the ADC’s full-power
input bandwidth.
To further enhance THD and SFDR performance at high
input frequencies (> 100MHz), a second transformer
(Figure 8) should be placed in series with the single-
ended-to-differential conversion transformer. This trans-
former reduces the increase of even-order harmonics
at high frequencies.
Single-Ended, AC-Coupled Analog Inputs
Although not recommended, the MAX1214N can be used
in single-ended mode (Figure 9). AC-couple the analog
signals to the positive input INP through a 0.1µF capacitor
terminated with a 49.9Ω resistor to AGND. Terminate the
negative input INN with a 49.9Ω resistor in series with a
0.1µF capacitor to AGND. In single-ended mode, the
input range is limited to approximately half of the FSR of
the device, and dynamic performance usually degrades.
AV_CC
OV_CC
SINGLE-ENDED
INPUT TERMINAL
0.1µF
1 ADT1-1WT ⁴
5
2
3
6
6
3 ADT1-1WT
12
5
2
1
4
0.1µF
INP
10Ω
24.9Ω
24.9Ω
10Ω
INN
0.1µF
MAX1214N
D0P/N–D11P/N,
0RP/N
12
AGND OGND
Figure 8. Analog Input Configuration with Back-to-Back Transformers and Secondary-Side Termination
SINGLE-ENDED
INPUT TERMINAL
0.1µF
INP
49.9Ω
1%
0.1µF
INN
49.9Ω
1%
Figure 9. Single-Ended, AC-Coupled Analog Input Configuration
AV_CC OV_CC
MAX1214N
D0P/N–D11P/N, 0RP/N
12
AGND OGND
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