DS8102 Datasheet, PDF(4/9 Page) Maxim Integrated Products – Dual Delta-Sigma Modulator and Encoder

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DS8102 Datasheet, PDF (4/9 Pages) Maxim Integrated Products – Dual Delta-Sigma Modulator and Encoder

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Dual Delta-Sigma Modulator and Encoder

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Pin Description

NAME

DGND

AGND

Digital Ground

Analog Ground

FUNCTION

VREF

AN1-

AN1+

AN0-

AN0+

VDD

CLKSEL

Reference Voltage Input/Output. When APDREF = 0, the buffered internal voltage reference is driven on

this pin as an output and can be used by other devices. When APDREF = 1, an external voltage

reference must be provided on this pin.

Negative Input for Differential Analog Input Channel 1

Positive Input for Differential Analog Input Channel 1

Negative Input for Differential Analog Input Channel 0

Positive Input for Differential Analog Input Channel 0

Digital and Analog Power Supply

Clock Select Input. When CLKSEL = 0, the DS8102 uses its internal 8MHz oscillator as a clock source.

When CLKSEL = 1, the DS8102 operates from an external clock source (which must be provided at

CLKIO).

Gain Select Input 0. This pin, along with G1, is used to select the gain setting for differential analog

input channel 0.

Gain Select Input 1. This pin, along with G0, is used to select the gain setting for differential analog

input channel 0.

CLKIO

Clock Input/Output. When CLKSEL = 0 (internal clock selected), the internal 8MHz clock is output on

this pin and can be used by external devices. When CLKSEL = 1 (external clock selected), an external

clock must be provided on this pin.

MNOUT

Manchester Encoder Output. This output pin provides a Manchester-encoded bit stream containing

output bits from both modulators interleaved with an alternating synchronization bit.

Reset. This input pin can be used to force the DS8102 into a shutdown (low-power) state by driving

RST RST = 0. If the external reset function is not used, this pin must be connected to VDD for proper

operation. An RC circuit is not required on this pin for power-up, as this function is provided internally.

APDREF

Analog Power-Down Reference. This input pin controls whether the internal voltage reference is

enabled. If APDREF = 0, the internal voltage reference is enabled and the voltage reference level is

driven out on VREF. If APDREF = 1, the internal voltage reference is disabled and an external voltage

reference must be provided on VREF.

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