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DS1340_06 Datasheet, PDF (4/14 Pages) Maxim Integrated Products – I2C RTC with Trickle Charger
I2C RTC with Trickle Charger
POWER-UP/POWER-DOWN CHARACTERISTICS
(TA = -40°C to +85°C) (Figure 2)
PARAMETER
Recovery at Power-Up
VCC Fall Time; VPF(MAX) to
VPF(MIN)
SYMBOL
tREC (Note 17)
tVCCF
CONDITIONS
VCC Rise Time; VPF(MIN) to
VPF(MAX)
tVCCR
MIN TYP MAX UNITS
2
ms
300
µs
0
µs
WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery-backup mode.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Limits at -40°C are guaranteed by design and not production tested.
After this period, the first clock pulse is generated.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the VIH(MIN) of the SCL
signal) to bridge the undefined region of the falling edge of SCL.
The maximum tHD:DAT only has to be met if the device does not stretch the low period (tLOW) of the SCL signal.
A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT ≥ to 250ns must be met. This
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line tR MAX + tSU:DAT = 1000 + 250 = 1250ns
before the SCL line is released.
CB—total capacitance of one bus line in pF.
The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set over the 0V ≤ VCC ≤
VCCMAX and 1.3V ≤ VBAT ≤ 3.7V range.
All voltages are referenced to ground.
Measured at VCC = typ, VBACKUP = 0V, register 08h = A5h.
The use of the 250Ω trickle-charge resistor is not allowed at VCC > 3.63V and should not be enabled.
Measured at VCC = typ, VBACKUP = 0V, register 08h = A6h.
Measured at VCC = typ, VBACKUP = 0V, register 08h = A7h.
ICCA—SCL clocking at max frequency = 400kHz.
Specified with I2C bus inactive.
Measured with a 32.768kHz crystal attached to the X1 and X2 pins.
Limits at +25°C are guaranteed by design and not production tested.
This delay applies only if the oscillator is enabled and running. If the oscillator is disabled or stopped, no power-up delay
occurs.
SDA
tBUF
tLOW
tR
tF
tHD:STA
SCL
STOP
START
tHD:STA
Figure 1. Data Transfer on I2C Serial Bus
tHD:DAT
tHIGH
tSU:DAT
tSU:STA
REPEATED
START
4 _____________________________________________________________________
tSP
tSU:STO