MAX11208 Datasheet, PDF (3/14 Pages) Maxim Integrated Products – 20-Bit, Single-Channel, Ultra-Low-Power, Delta-Sigma ADC with 2-Wire Serial Interface

20-Bit, Single-Channel, Ultra-Low-Power,
Delta-Sigma ADC with 2-Wire Serial Interface
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = +3.6V, VDVDD = +1.8V, VREFP - VREFN = VAVDD; internal clock, TA = TMIN to TMAX, unless otherwise noted. Typical values
are at TA = +25NC under normal conditions, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
REF Dynamic Input Current
7.5
FA
AIN Input Capacitance
10
pF
REF Input Capacitance
15
pF
AIN Voltage Range
REF Voltage Range
Input Sampling Rate
VAINP - VAINN
MAX11208A
fS
MAX11208B
-VREF
+VREF
V
VAVDD
V
246
kHz
225
REF Sampling Rate
MAX11208A
MAX11208B
246
kHz
225
LOGIC INPUTS (SCLK, CLK)
Input Current
Input leakage current
Q1
FA
Input Low Voltage
VIL
0.3 x
VDVDD
V
Input High Voltage
VIH
0.7 x
VDVDD
V
Input Hysteresis
External Clock
LOGIC OUTPUTS (RDY/DOUT)
Output Low Level
VHYS
MAX11208A
MAX11208B
VOL IOL = 1mA, also tested for VDVDD = 3.6V
200
2.4576
2.2528
0.4
mV
MHz
V
Output High Level
VOH IOH = 1mA, also tested for VDVDD = 3.6V
0.9 x
VDVDD
V
Floating State Leakage Current
Output leakage current
Q10
FA
Floating State Output
Capacitance
9
pF
POWER REQUIREMENTS
Analog Supply Voltage
AVDD
2.7
3.6
V
Digital Supply Voltage
DVDD
1.7
3.6
V
Total Operating Current
(AVDD + DVDD)
230 300
FA
DVDD Operating Current
45
60
FA
AVDD Operating Current
185 245
FA
AVDD Sleep Current
0.4
2
FA
DVDD Sleep Current
0.35
2
FA
2-WIRE SERIAL-INTERFACE TIMING CHARACTERISTICS
SCLK Frequency
SCLK Pulse Width Low
SCLK Pulse Width High
fSCLK
t1
t2
60/40 duty cycle 5MHz clock
40/60 duty cycle 5MHz clock
5
MHz
80
ns
80
ns
SCLK Rising Edge to Data Valid
Transition Time
t3
40
ns
_______________________________________________________________________________________   3