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| MAX11135_V1 Datasheet, PDF (3/40 Pages) Maxim Integrated Products – 500ksps, Low-Power, Serial 12-/10-/8-Bit,4-/8-/16-Channel ADCs | |||
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MAX11135âMAX11143
500ksps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11135/MAX11136/MAX11137) (continued)
(VDD = 2.35V to 3.6V, VOVDD = 1.5V to 3.6V, fSAMPLE = 500ksps, fSCLK = 8MHz, 50% duty cycle, VREF+ = VDD, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 2)
PARAMETER
Full-Power Bandwidth
Full-Linear Bandwidth
SYMBOL
Crosstalk
CONVERSION RATE
Power-Up Time
Acquisition Time
Conversion Time
External Clock Frequency
Aperture Delay
Aperture Jitter
ANALOG INPUT
tPU
tACQ
tCONV
fSCLK
Input Voltage Range
VINA
Absolute Input Voltage Range
Static Input Leakage Current
IILA
Input Capacitance
CAIN
EXTERNAL REFERENCE INPUT
REF- Input Voltage Range
VREF-
CONDITIONS
-3dB
-0.1dB
SINAD > 70dB
-0.5dB below full scale of
249.878kHz sine wave input to the
channel being sampled, apply full-
scale 219.97kHz sine wave signal to
all 15 nonselected input channels
Conversion cycle, external clock
Internally clocked (Note 8)
Externally clocked, fSCLK = 8MHz,
16 cycles (Note 8)
RMS
Unipolar (single-ended and pseudo
differential)
Bipolar
(Note 9)
RANGE bit set to 0
RANGE bit set to 1
AIN+, AIN- relative to GND
VAIN_ = VDD, GND
During acquisition time,
RANGE bit = 0 (Note 10)
During acquisition time,
RANGE bit = 1 (Note 10)
MIN
2000
0.16
0
-VREF+/2
-VREF+
-0.1
-0.3
TYP
MAX UNITS
50
MHz
7.5
1.5
MHz
-88
dB
2
Cycles
312
ns
5.9
µs
ns
8
MHz
8
ns
30
ps
VREF+
VREF+/2
V
VREF+
VREF+ + 0.1 V
-0.1
±1.5
FA
15
pF
7.5
+1
V
REF+ Input Voltage Range
VREF+
1
VDD + 50mV V
REF+ Input Current
IREF+
VREF+ = 2.5V, fSAMPLE = 500ksps
VREF+ = 2.5V, fSAMPLE = 0
36.7
0.1
FA
ââ3
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