DS26518 Datasheet, PDF (288/312 Pages) Maxim Integrated Products – 8-Port T1/E1/J1 Transceiver

DS26518 8-Port T1/E1/J1 Transceiver
Figure 11-28. E1 Transmit-Side Interleave Bus Operation—BYTE Mode
TSSYNCIOn
TSERn¹
FR1 CH32
FR0 CH1
TSIGn¹
FR1 CH32
FR0 CH1
TSERn^{2 FR2 CH32 FR3 CH32 FR0 CH1 FR1 CH1}
TSIGn^{2 FR2 CH32 FR3 CH32 FR0 CH1 FR1 CH1}
FR1 CH1
FR1 CH1
FR2 CH1 FR3 CH1
FR2 CH1 FR3 CH1
FR0 CH2
FR0 CH2
FR0 CH2 FR1 CH2
FR0 CH2 FR1 CH2
FR1 CH2
FR1 CH2
FR2 CH2 FR3 CH2
FR2 CH2 FR3 CH2
TSYSCLKn
TSSYNCIOn³
TSERn
TSIGn
FRAMER 3, CHANNEL 32
LSB MSB
FRAMER 3, CHANNEL 32
A B C/A D/B
BIT DETAIL
FRAMER 0, CHANNEL 1
LSB MSB
FRAMER 0, CHANNEL 1
A B C/A D/B
FRAMER 1, CHANNEL 1
LSB
FRAMER 1, CHANNEL 1
A B C/A D/B
NOTE 1: 4.096MHz BUS CONFIGURATION.
NOTE 2: 8.192MHz BUS CONFIGURATION.
NOTE 3: TSSYNCIOn IS IN THE INPUT MODE (TIOCR.2 = 0).
NOTE 4: THOUGH NOT SHOWN, TCHCLKn CONTINUES TO MARK THE CHANNEL LSB FOR THE FRAMER'S ACTIVE PERIOD.
NOTE 5: THOUGH NOT SHOWN, TCHBLKn CONTINUES TO MARK THE BLOCKED CHANNELS FOR THE FRAMER’S ACTIVE PERIOD.
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