MAX16068 Datasheet, PDF (27/40 Pages) Maxim Integrated Products – 6-Channel, Flash-Configurable System Manager with Nonvolatile Fault Registers

6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
Send Byte
The send byte protocol allows the master device to
send one byte of data to the slave device (see Figure
9). The send byte presets a register pointer address for
a subsequent read or write. The slave sends a NACK
instead of an ACK if the master tries to send a memory
address or command code that is not allowed. If the
master sends A5h or A6h, the data is ACK, because this
could be the start of the write block or read block. If the
master sends a STOP condition before the slave asserts
an ACK, the internal address pointer does not change.
If the master sends A7h, this signifies a software reboot.
The send byte procedure is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit memory address or com-
mand code.
5) The addressed slave asserts an ACK (or NACK) on
SDA.
6) The master sends a STOP condition.
Receive Byte
The receive byte protocol allows the master device to
read the register content of the MAX16068 (see Figure
9). The flash or register address must be preset with a
send byte or write word protocol first. Once the read
is complete, the internal pointer increases by one.
Repeating the receive byte protocol reads the contents
of the next address. The receive byte procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a read
bit (high).
3) The addressed slave asserts an ACK on SDA.
4) The slave sends 8 data bits.
5) The master asserts a NACK on SDA.
6) The master generates a STOP condition.
Write Byte
The write byte protocol (see Figure 9) allows the mas-
ter device to write a single byte in the default page,
extended page, or flash page, depending on which
page is currently selected. The write byte procedure is
as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit memory address.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The master sends a STOP condition.
To write a single byte, only the 8-bit memory address
and a single 8-bit data byte are sent. The data byte is
written to the addressed location if the memory address
is valid. The slave asserts a NACK at step 5 if the mem-
ory address is not valid.
When PEC is enabled, the Write Byte protocol becomes:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write bit
(low).
3) The addressed slave asserts an ACK on the data
line.
4) The master sends an 8-bit command code.
5) The active slave asserts an ACK on the data line.
6) The master sends an 8-bit data byte.
7) The slave asserts an ACK on the data line.
8) The master sends an 8-bit PEC byte.
9) The slave asserts an ACK on the data line (if PEC is
good, otherwise NACK).
10) The master generates a STOP condition.
Read Byte
The read byte protocol (see Figure 9) allows the master
device to read a single byte located in the default page,
extended page, or flash page depending on which page is
currently selected. The read byte procedure is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit memory address.
5) The addressed slave asserts an ACK on SDA.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave address and a read
bit (high).
8) The addressed slave asserts an ACK on SDA.
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