MAX14500 Datasheet, PDF (27/41 Pages) Maxim Integrated Products – Hi-Speed USB-to-SD Card Readers with Bypass

Hi-Speed USB-to-SD Card
Readers with Bypass
sists of two blocks: a clock squarer input (enabled by
default), which accepts low-signal amplitude TCXO sig-
nals (down to 200mV), and a PLL with fixed dividers.
The PLL sub system can be configured using the I²C
interface. The complete list of PLL subsystem combina-
tions are listed in Table 3.
Table 3. Clock Source Bit Values
CLKSOURCE
00000b
00001b
00010b
00101b
00110b
01001b
01010b
01101b
01110b
SOURCE (MHz)
NOTES
See Ordering
Information/
Selector Guide
Default low-amplitude
clock
19.2
Rail-to-rail square wave
19.2
Low-amplitude sine
wave
13.0
Rail-to-rail square wave
13.0
Low-amplitude sine
wave
12.0
Rail-to-rail square wave
12.0
Low-amplitude sine
wave
26.0
Rail-to-rail square wave
26.0
Low-amplitude sine
wave
I²C Serial Interface
Serial Addressing
The MAX14500–MAX14503 operate as I²C slave devices
that send and receive data through an I²C-compatible
2-wire interface. The interface uses a serial-data line
(SDA) and a serial-clock line (SCL) to achieve bidirec-
tional communication between master(s) and slave(s). A
master initiates all data transfers to and from the
MAX14500–MAX14503, and generates the SCL clock
that synchronizes the data transfer. The SDA line oper-
ates as both an input and an open-drain output requiring
a pullup resistor on SDA. The SCL line operates only as
an input. A pullup resistor is required on SCL if there are
multiple masters on the 2-wire interface, or if the master
in a single-master system has an open-drain SCL output.
Each transmission consists of a START (S) condition by
a master, followed by the MAX14500–MAX14503’s 7-bit
slave address, plus a R/W bit, a register address byte,
one or more data bytes, and finally a STOP (P) condition.
START and STOP Conditions
Both SCL and SDA remain high when the interface is
idle. A master signals the beginning of a transmission
with a START condition by transitioning SDA from high
to low while SCL is high (Figure 13). When the master
has finished communicating with the slave, it issues a
STOP condition by transitioning SDA from low to high
while SCL is high. The bus is then free for another
transmission.
SDA
SCL
S
START
CONDITION
Figure 13. START and STOP Conditions
P
STOP
CONDITION
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