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MAX1533 Datasheet, PDF (23/38 Pages) Maxim Integrated Products – High-Efficiency, 5x Output, Main Power-Supply Controllers for Notebook Computers
High-Efficiency, 5x Output, Main Power-Supply
Controllers for Notebook Computers
tON(SKIP)
≥
IIDLEL
VIN - VOUT
0
ON-TIME
ILOAD(SKIP)
TIME
TO ERROR
AMPLIFIER
FB
REF
(2.0V)
12R
R
CSL
ADJUSTABLE
OUTPUT
FIXED OUTPUT
FB = GND
Figure 4. Pulse-Skipping/Discontinuous Crossover Point
Figure 5. Dual-Mode Feedback Decoder
Output Voltage
DC output accuracy specifications in the Electrical
Characteristics table refer to the error-comparator’s
threshold. When the inductor continuously conducts,
the MAX1533/MAX1537 regulate the peak of the output
ripple, so the actual DC output voltage is lower than the
slope-compensated trip level by 50% of the output rip-
ple voltage. For PWM operation (continuous conduc-
tion), the output voltage is accurately defined by the
following equation:
VOUT(PWM)
⎛
= VNOM ⎝⎜1 -
ASLOPE VNOM
VIN
⎞
⎠⎟
-
⎛
⎝⎜
VRIPPLE
2
⎞
⎠⎟
where VNOM is the nominal output voltage, ASLOPE
equals 1%, and VRIPPLE is the output ripple voltage
(VRIPPLE = ESR x ∆IINDUCTOR as described in the
Output Capacitor Selection section).
In discontinuous conduction (IOUT < ILOAD(SKIP)), the
MAX1533/MAX1537 regulate the valley of the output
ripple, so the output voltage has a DC regulation level
higher than the error-comparator threshold. For PFM
operation (discontinuous conduction), the output volt-
age is approximately defined by the following equation:
VOUT(PFM)
=
VNOM
+
1
2
⎛
⎝⎜
fSW
fOSC
⎞
⎠⎟
IIDLE
×
ESR
where VNOM is the nominal output voltage, fOSC is the
maximum switching frequency set by the internal oscil-
lator, fSW is the actual switching frequency, and IIDLE is
the idle-mode inductor current when pulse skipping.
Adjustable/Fixed Output Voltages
(Dual-Mode Feedback)
Connect FB3 and FB5 to GND to enable the fixed
SMPS output voltages (3.3V and 5V, respectively), set
by a preset, internal resistive voltage-divider connected
between CSL_ and analog ground. Connect a resistive
voltage-divider at FB_ between CSL_ and GND to
adjust the respective output voltage between 1V and
5.5V (Figure 5). Choose R2 (resistance from FB to
GND) to be about 10kΩ and solve for R1 (resistance
from OUT to FB) using the equation:
R1
=
R2
⎛ VOUT _
⎝⎜ VFB _
⎞
− 1⎠⎟
where VFB_ = 1V nominal.
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