MAX15014_07 Datasheet, PDF (21/26 Pages) Maxim Integrated Products – 1A, 4.5V to 40V Input Buck Converters with 50mA Auxiliary LDO Regulators

1A, 4.5V to 40V Input Buck Converters with
50mA Auxiliary LDO Regulators
The error amplifier gain between f_P2 and f_P3 is approxi-
mately equal to R5 / (R6 || R3).
The ESR zero frequency f_ZESR might not be very much
higher than the double-pole frequency f_LC, therefore
the value of R5 can be calculated as:
R5 = ^{R3 × R6} ×
f_C2
R3 + R6 G_{MOD_DC} × f_LC2
C7 can still be calculated as:
C7 =
1
0.5 × 2π × R5 × f_LC
f_P3 is set at 5xf_C. Therefore, C8 is calculated as:
V_{IN_LDO}
IN_LDO
LDO_OUT
MAX15014–
R1
MAX15017
SET_LDO
R2
SGND
C8 =
C7
2π × C7 × R5 × f_P3 −1
Setting the LDO Linear
Regulator Output Voltage
The MAX15014–MAX15017 LDO regulator features Dual
Mode™ operation: it can operate in either a preset voltage
mode or an adjustable mode. In preset voltage mode,
internal trimmed feedback resistors set the internal linear
regulator to 3.3V or 5V (see the Selector Guide). Select
preset voltage mode by connecting SET_LDO to ground.
In adjustable mode, select an output voltage between
1.5V and 11V using two external resistors connected as a
voltage-divider to SET_LDO (see Figure 5). Set the output
voltage using the following equation:
V_OUT
=
V_SET
_ LDO ^{⎛⎝⎜1+}
R1⎞
R2 ⎠⎟
where V_{SET_LDO} = 1.241V and the recommended value
for R2 is around 50kΩ.
Setting the RESET Timeout Delay
The RESET timeout period is adjustable to accommo-
date a variety of µP applications. Adjust the RESET
timeout period by connecting a capacitor (C_CT)
between CT and SGND.
t_RP
=
C_CT × V_{CT −}
I_{CT − THQ}
TH
where V_CT-TH = delay comparator threshold (rising) =
1.241V (typ), I_CT-THQ = CT charge current = 2 x 10^-6A
(typ), t_RP is in seconds and C_CT is in Farads.
Figure 5. Setting the Output Voltage Using a Resistive Divider
Connect CT to LDO_OUT to select the internally fixed
timeout period. C_CT must be low-leakage-type capaci-
tor. Ceramic capacitors are recommended; do not use
capacitors lower than 200pF to avoid the influence of
parasitic capacitances.
Capacitor Selection and
Regulator Stability
For stable operation over the full temperature range and
with load currents up to 50mA, use a 10µF (min) output
capacitor (C_{LDO_OUT}) with a maximum ESR of 0.4Ω. To
reduce noise and improve load-transient response, sta-
bility, and power-supply rejection, use larger output
capacitor values. Some ceramic dielectrics such as Z5U
and Y5V exhibit very large capacitance and ESR varia-
tion with temperature and are not recommended. With
X7R or X5R dielectrics, 15µF should be sufficient for
operation over their rated temperature range. For higher-
ESR tantalum capacitors (up to 1Ω), use 22µF or more to
maintain stability. To improve power-supply rejection
and transient response use a minimum 0.1µF capacitor
between IN_LDO and SGND.
Power Dissipation
The MAX15014–MAX15017 are available in a thermally
enhanced package and can dissipate up to 2.86W at
T_A = +70°C. When the die temperature reaches
+160°C, the part shuts down and is allowed to cool.
After the die cools by 20°C, the device restarts with a
soft-start. The power dissipated in the device is the
sum of the power dissipated in the LDO, power dissi-
pated from supply current (P_Q), transition losses due to
switching the internal power MOSFET (P_SW), and the
Dual Mode is a trademark of Maxim Integrated Products, Inc.
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