MAX15014_07 Datasheet, PDF (17/26 Pages) Maxim Integrated Products – 1A, 4.5V to 40V Input Buck Converters with 50mA Auxiliary LDO Regulators

1A, 4.5V to 40V Input Buck Converters with
50mA Auxiliary LDO Regulators
feature a preset output voltage of 5V (MAX1501_A) or
3.3V (MAX1501_B). Alternatively, the output voltage
can be adjusted using an external resistive-divider net-
work connected between LDO_OUT, SET_LDO, and
SGND. See Figure 5.
RESET Output
The RESET output is typically connected to the reset
input of a microprocessor (µP). A µP’s reset input starts
or restarts the µP in a known state. The MAX15014–
MAX15017 supervisory circuits provide the reset logic
to prevent code-execution errors during power-up,
power-down, and brownout conditions. RESET
changes from high to low whenever the monitored volt-
age drops below the RESET threshold voltage. Once
the monitored voltage exceeds its respective RESET
threshold voltage(s), RESET remains low for the RESET
timeout period, then goes high. The RESET timeout
period is adjustable with an external capacitor (C_CT)
connected to CT.
Thermal-Shutdown Protection
The MAX15014–MAX15017 feature thermal shutdown
protection which limits the total power dissipation in the
device and protects it in the event of an extended ther-
mal fault condition. When the die temperature exceeds
+160°C, an internal thermal sensor shuts down the part,
turning off the DC-DC converter and the LDO regulator,
and allowing the IC to cool. After the die temperature
falls by 20°C, the part restarts with a soft-start sequence.
Applications Information
Setting the Output Voltage
Connect a resistive divider (R3 and R4, see Figures 6
and 7) from OUT to FB to SGND to set the output volt-
age. Choose R3 and R4 so that DC errors due to the FB
input bias current do not affect the output-voltage
setting precision. For the most common output-voltage
settings (3.3V or 5V), R3 values in the 10kΩ range are
adequate. Select R3 first and calculate R4 using the
following equation:
R4 = ^R3
⎡
⎢
⎣
V_OUT
V_FB
− 1^⎤⎥
⎦
where V_FB = 1.235V.
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX15014–MAX15017: inductance
value (L), peak inductor current (I_PEAK), and inductor
saturation current (I_SAT). The minimum required induc-
tance is a function of operating frequency, input-to-out-
put voltage differential, and the peak-to-peak inductor
current (∆I_P-P). Higher ∆I_P-P allows for a lower inductor
value while a lower ∆I_P-P requires a higher inductor
value. A lower inductor value minimizes size and cost
and improves large-signal and transient response, but
reduces efficiency due to higher peak currents and
higher peak-to-peak output voltage ripple for the same
output capacitor. On the other hand, higher inductance
increases efficiency by reducing the ∆I_P-P. Resistive
losses due to extra wire turns can exceed the benefit
gained from lower ∆I_P-P levels especially when the
inductance is increased without also allowing for larger
inductor dimensions. A good compromise is to choose
∆I_P-P equal to 40% of the full load current. Calculate the
inductor using the following equation:
L = ^{VOUT(VIN − VOUT)}
V_IN × f_SW × ∆I_P−P
V_IN and V_OUT are typical values so that efficiency is opti-
mum for typical conditions. The switching frequency
(f_SW) is internally fixed at 135kHz (MAX15014/
MAX15016) or 500kHz (MAX15015/MAX15017) and
can vary when synchronized to an external clock (see
the Oscillator/Synchronization Input (SYNC) section).
The ∆I_P-P, which reflects the peak-to-peak output rip-
ple, is worst at the maximum input voltage. See the
Output-Capacitor Selection section to verify that the
worst-case output ripple is acceptable. The inductor
current (I_SAT) is also important to avoid current run-
away during continuous output short circuit. Select an
inductor with an I_SAT specification higher than the
maximum peak current limit of 2.6A.
Input-Capacitor Selection
The discontinuous input current of the buck converter
causes large input ripple currents and therefore the
input capacitor must be carefully chosen to keep the
input voltage ripple within design requirements. The
input voltage ripple is comprised of ∆V_Q (caused by
the capacitor discharge) and ∆V_ESR (caused by the
ESR of the input capacitor). The total voltage ripple is
the sum of ∆V_Q and ∆V_ESR. Calculate the input capaci-
tance and ESR required for a specified ripple using the
following equations:
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