MAX14824 Datasheet, PDF (19/28 Pages) Maxim Integrated Products – IO-Link Master Transceiver

MAX14824
IO-Link Master Transceiver
BIT
NAME
DESCRIPTION
D2
UV33Int
Internal 3.3V LDO (LDO33) Undervoltage Warning. Both the UV33Int interrupt bit and
the UV33En bit (in the Mode register) are set when V_LDO33 falls below the 2.4V LDO33
undervoltage threshold. If UV33En is set in the Mode register, IRQ asserts low when the
UV33Int bit is 1. Read the Status register to clear the UV33Int bit and deassert IRQ.
Set the UV33En bit to 1 in the Mode register to enable undervoltage monitoring for
UV33Int. When enabled, UV asserts high when the UV33Int bit is 1. UV deasserts when
V_LDO33 rises above the LDO33 undervoltage threshold.
D1
UV24Int
V_CC Undervoltage Interrupt. The UV24Int interrupt bit and the UV24 bit (in the Mode
register) are set when the V_CC voltage falls below the 7.4V undervoltage threshold. IRQ
asserts low when the UV24Int bit is 1. Read the Status register to clear the UV24Int bit
and deassert IRQ. V_CC undervoltage detection cannot be disabled.
D0
OTempInt
Overtemperature Warning. The OTempInt interrupt bit and the OTemp bit (in the Mode
register) are set when a high-temperature condition is detected by the device. OTemp
is set when the temperature of the die exceeds +115NC (typ). OTempInt is set and IRQ
asserts when the OTemp bit is 1. The OTempInt bit is cleared and IRQ deasserts when
the Status register is read.
Once cleared, OTempInt is not reset if the die temperature remains above the thermal
warning threshold and does not fall below +95°C.
Table 2. DiLvl and LI Output
V_DI (V)
< 5.2
>8
DiLvl BIT
0
1
LI OUTPUT
High
Low
Table 3. QLvl and RX Output
V_C/Q (V)
<8
>13
QLvl BIT
1
0
RX OUTPUT
High
Low
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