MAX1245 Datasheet, PDF (19/20 Pages) Maxim Integrated Products – +2.375V, Low-Power, 8-Channel, Serial 12-Bit ADC

+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
TMS320LC3x-to-MAX1245 Interface
Figure 18 shows an application circuit to interface the
MAX1245 to the TMS320 in external clock mode. The tim-
ing diagram for this interface circuit is shown in Figure 19.
Use the following steps to initiate a conversion in the
MAX1245 and to read the results:
1) The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX1245’s SCLK input.
2) The MAX1245’s CS pin is driven low by the TMS320’s
XF_ I/O port, to enable data to be clocked into the
MAX1245’s DIN.
3) An 8-bit word (1XXXXX11) should be written to the
MAX1245 to initiate a conversion and place the
device into external clock mode. Refer to Table 1 to
select the proper XXXXX bit values for your specific
application.
4) The MAX1245’s SSTRB output is monitored via the
TMS320’s FSR input. A falling edge on the SSTRB
output indicates that the conversion is in progress
and data is ready to be received from the
MAX1245.
5) The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 12-bit conversion result followed by four
trailing bits, which should be ignored.
6) Pull CS high to disable the MAX1245 until the next
conversion is initiated.
XF
CLKX
TMS320LC3x
CLKR
DX
DR
FSR
CS
SCLK
MAX1245
DIN
DOUT
SSTRB
Figure 18. MAX1245-to-TMS320 Serial Interface
CS
SCLK
DIN
SSTRB
DOUT
START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0
MSB B10 B1 LSB
HIGH
IMPEDANCE
HIGH
IMPEDANCE
Figure 19. TMS320 Serial-Interface Timing Diagram
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