MAX16065 Datasheet, PDF (17/61 Pages) Maxim Integrated Products – 12-Channel/8-Channel, Flash-Configurable System Managers with Nonvolatile Fault Registers

12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
Table 7. tFAULT Delay Settings
CODE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
DELAY
120Fs
150Fs
250Fs
380Fs
600Fs
1ms
1.5ms
2.5ms
4ms
6ms
10ms
15ms
25ms
40ms
60ms
100ms
When the secondary sequence group is already pow-
ered down and EN or the Software Enable bit is set
to ‘0’, the reverse power-down sequence is similar to
above, but starts from the last slot assigned to the pri-
mary sequence r7Dh[7:4]. After the last assigned slot is
powered down the previous slot will power down and so
on until Slot 0 is powered down.
To power down the secondary sequence group, drive
EN2 low or set r75h[1] to ‘0’. The secondary reverse
power-down sequence will start at Slot 12 and end at
the primary sequence monitoring mode state at which
point only the slots assigned to the primary sequence
are active.
Voltage/Current Monitoring
The MAX16065/MAX16066 feature an internal 10-bit
ADC that monitors the MON_ voltage inputs. An internal
multiplexer cycles through each of the enabled inputs,
taking less than 40Fs for a complete monitoring cycle.
Each acquisition takes approximately 3.2Fs. At each
multiplexer stop, the 10-bit ADC converts the analog
input to a digital result and stores the result in a regis-
ter. ADC conversion results are stored in registers r00h
to r1Ah (see Table 10). Use the SMBus or JTAG serial
interface to read ADC conversion results.
The MAX16065 provides twelve inputs, MON1–MON12,
for voltage monitoring. The MAX16066 provides eight
inputs, MON1–MON8, for voltage monitoring. Each input
voltage range is programmable in registers r43h to r45h
(see Table 9). When MON_ configuration registers are
set to ’11,’ MON_ voltages are not monitored, and the
multiplexer does not stop at these inputs, decreasing
the total cycle time. These inputs cannot be configured
to trigger fault conditions.
The three programmable thresholds for each monitored
voltage include an overvoltage, an undervoltage, and a
secondary warning threshold that can be set in r73h[3]
to be either an undervoltage or overvoltage threshold.
See the Faults section for more information on setting
overvoltage and undervoltage thresholds. All voltage
thresholds are 8 bits wide. The 8 MSBs of the 10-bit ADC
conversion result are compared to these overvoltage
and undervoltage thresholds.
For any undervoltage or overvoltage condition to be
monitored and any faults detected, the MON_ input must
be assigned to a sequence order or set to monitoring
mode as described in the Sequencing section.
Inputs that are not enabled are not converted by the
ADC; they contain the last value acquired before that
channel was disabled.
The ADC conversion result registers are reset to 00h at
boot-up. These registers are not reset when a reboot
command is executed.
Configure the MAX16065/MAX16066 for differential
mode in r46h (Table 9). The possible differential pairs
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