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MAX1586A_08 Datasheet, PDF (17/30 Pages) Maxim Integrated Products – High-Efficiency, Low-IQ PMICs with Dynamic Core for PDAs and Smart Phones
High-Efficiency, Low-IQ PMICs with
Dynamic Core for PDAs and Smart Phones
MAIN
BATT
BATT
DBI (3.15V OR ADJ)
LBI (3.6V OR ADJ)
OPEN-DRAIN LOW-BATT OUT
OPEN-DRAIN DEAD-BATT OUT
TO nBATT_FAULT
REF
REF
1.25V
LBO
DBO
UVLO
AND
BATT
MON
FROM CPU
SYS_EN
RUN
SLEEP
Li+
BACKUP
BATTERY
V7, VCC_BATT
(1ST SUPPLY, ALWAYS ON)
TO CPU
nRESET
ON1
ON2
SLP
BKBT
V7
RSO
RESET INPUT
FORCE REG3
TO PWM
TO CPU
nVCC_FAULT
MR
PWM3
POK
TO V1
REG1 OK
V7
RESET
2.425V
65ms
V1–V6
POWER-
OK
IN SLPIN
MAX1586
STEP-DOWN
PWM
REG1
ON
SLEEP
LDO
ON
STEP-DOWN
PWM
REG2
SLEEP
LDO
STEP-DOWN
PWM
REG3
PWM
ADJ
ON
RAMP
100kΩ
LDO
REG
4
V3
DAC
LDO
REG
5
CC1
CC2
CC3
I2C
SERIAL
LDO
REG
6
GND
SRAD SCL SDA
PV1
LX1
PG1
V1
FB1
PV2
TO BATT
LX2
PG2
V2
FB2
PV3
TO BATT
LX3
PG3
FB3
ON3
IN45
TO V2
V4
BYP
ON4
ON5
V5
IN6
TO V2
V6
ON6
FROM CPU
SYS_EN
V1, VCC_IO
3.3V WITH FB1 = GND,
OR ADJ WITH RESISTORS
V2, VCC_MEM
2.5V WITH FB2 = GND,
1.8V WITH FB2 = IN (MAX1586A, MAX1587A)
3.3V WITH FB2 = IN (MAX1586B)
OR ADJ WITH RESISTORS
V3, VCC_CORE
0.7V TO 1.475V
500mA (MAX1586A, MAX1586B, MAX1587A)
900mA (MAX1586C, MAX1587C)
FROM CPU
PWR_EN
V4, VCC_PLL
1.3V, 35mA
V5, VCC_SRAM
1.1V, 35mA
VCC_USIM
0V, 1.8V, 3.0V (DEF = 0V)
Figure 1. MAX1586 Functional Diagram (The MAX1587 omits some features. See the Pin Description section.)
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