MAX1586A_08 Datasheet, PDF (16/30 Pages) Maxim Integrated Products – High-Efficiency, Low-IQ PMICs with Dynamic Core for PDAs and Smart Phones

High-Efficiency, Low-I_Q PMICs with
Dynamic Core for PDAs and Smart Phones
Pin Description (continued)
PIN
MAX MAX
1586 1587
NAME
FUNCTION
35
29 SRAD ^{Serial Address Bit. SRAD allows the serial address of the MAX1586/MAX1587 to be changed in case it}
conflicts with another serial device. If SRAD = GND, A1 = 0. If SRAD = IN, A1 = 1.
36
30
RSO
Open-Drain Reset Output. Deasserts when V7 exceeds 2.55V (typ rising). Has 65ms delay before release.
RSO is expected to connect to nRESET on the CPU.
37
31
MR
Manual Reset Input. A low input at MR causes the RSO output to go low and also resets the V3 output to its
default 1.3V setting. MR impacts no other MAX1586/MAX1587 functions.
38
32
CC3
REG 3 Compensation Node. Connect a series resistor and capacitor from CC3 to GND to compensate the
regulation loop. See the Compensation and Stability section.
39
33
FB3
REG3 Feedback-Sense Input. Connect directly to the REG3 output voltage. Output voltage is set by the
serial interface.
On/Off Input for REG6. Drive high to turn on. When enabled, the REG6 output activates. ON6 has hysteresis
40 — ON6 so an RC can be used to implement manual sequencing with respect to other inputs. It is expected that
ON1, ON2, and ON6 are connected to SYS_EN.
41
—
V6 ^{Also known as VCC_USIM. Linear-regulator output. This voltage is programmable through the I2C interface}
to 0V, 1.8V, 2.5V, or 3.0V. The default voltage is 0V. REG6 is activated when ON6 is high.
42 — IN6 Power Input to the V6 LDO. Typically connected to V1, but can also connect to IN.
43
36
PG1
REG1 Power Ground. Connect directly to a power-ground plane. Connect PG1, PG2, PG3, and GND
together at a single point as close as possible to the IC.
44 37 LX1 REG1 Switching Node. Connects to the REG1 inductor.
45
38
PV1
REG1 Power Input. Bypass to PG2 with a 4.7µF or greater low-ESR ceramic capacitor. PV1, PV2, PV3, and
IN must connect together externally.
On/Off Input for REG1. Drive high to turn on REG1. When enabled, the REG1 output soft-starts. ON1 has
46 35 ON1 hysteresis so an RC can be used to implement manual sequencing with respect to other inputs. It is
expected that ON1, ON2, and ON6 connect to SYS_EN.
Sleep Input. SLP selects which regulators ON1 and ON2 turn on. SLP = high is normal operation (ON1 and
47 39 SLP ON2 are the enables for the V1 and V2 DC-DC converters). SLP = low is sleep operation (ON1 and ON2 are
the enables for the V1 and V2 LDOs).
48
—
DBI ^{Dual-Mode, Dead-Battery Input. Connect DBI to IN to set the dead-battery falling threshold to 3.15V (no}
resistors needed). Connect DBI to a resistor-divider for an adjustable DBI threshold.
On/Off Input for REG4 and REG5. Drive high to turn on. When enabled, the REG4 and REG5 outputs
— 22 ON45 activate. ON45 has hysteresis so an RC can be used to implement manual sequencing with respect to
other inputs. It is expected that ON45 is connected to PWR_EN.
EP EP
EP
Exposed Metal Pad. Connect the exposed pad to ground. Connecting the exposed pad to ground does not
remove the requirement for proper ground connections to the appropriate ground pins.
Purchase of I²C components from Maxim Integrated Products,
Inc. or one of its sublicensed Associated Companies, conveys
a license under the Philips I²C Patent Rights to use these com-
ponents in an I²C system, provided that the system conforms
to the I²C Standard Specification as defined by Philips.
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