MAX1183 Datasheet, PDF (17/18 Pages) Maxim Integrated Products – Dual 10-Bit, 40Msps, +3V, Low-Power ADC with Internal Reference and Parallel Outputs

Dual 10-Bit, 40Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
nents minus the fundamental, the first five harmonics,
and the DC offset.
Signal-to-Noise Plus Distortion (SINAD)
SINAD is computed by taking the ratio of the RMS sig-
nal to all spectral components minus the fundamental
and the DC offset.
Effective Number of Bits (ENOB)
ENOB specifies the dynamic performance of an ADC at
a specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. ENOB
is computed from:
ENOB = ^{(SINADdB −1.76dB)}
6.02_dB
Total Harmonic Distortion (THD)
THD is typically the ratio of the RMS sum of the first four
harmonics of the input signal to the fundamental itself.
This is expressed as:


THD = 20 × log₁₀ 



V₂₂
+
V₃₂
+
V₄₂
+
V₅₂





V₁

where V₁ is the fundamental amplitude, and V₂ through
V₅ are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio expressed in decibels of the RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest spurious
component, excluding DC offset.
Intermodulation Distortion (IMD)
The two-tone IMD is the ratio expressed in decibels of
either input tone to the worst 3rd-order (or higher) inter-
modulation products. The individual input tone levels
are at -6.5dB full scale and their envelope is at -0.5dB
full scale.
Chip Information
TRANSISTOR COUNT: 10,811
PROCESS: CMOS
Functional Diagram
V_DD
GND
INA+
T/H
INA-
PIPELINE
ADC
OGND
OV_DD
10
10
DEC
OUTPUT
DRIVERS
D9A–D0A
CLK
CONTROL
OE
INB+
T/H
INB-
PIPELINE
ADC
10
DEC
OUTPUT
10
DRIVERS
D9B–D0B
REFERENCE
REFOUT
REFN COM REFP REFIN
MAX1183
T/B
PD
SLEEP
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