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MAX1032_11 Datasheet, PDF (17/32 Pages) Maxim Integrated Products – 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs
8- and 4-Channel, ±3 x VREF
Multirange Inputs, Serial 14-Bit ADCs
CS
SSTRB
SCLK
BYTE 1
DIN
S C2 C1 C0 0 0 0 0
***
DOUT
ANALOG INPUT
TRACK AND HOLD*
INTCLK**
HOLD
HIGH
IMPEDANCE
tACQ
TRACK
100ns to 400ns
fSAMPLE ≈ fSCLK / 24 + fINTCLK / 28
SAMPLING INSTANT
fINTCLK ≈ 4.5MHz
*TRACK AND HOLD TIMING IS CONTROLLED BY INTCLK, AND IS NOT ACCESSIBLE TO THE USER.
**INTCLK IS AN INTERNAL SIGNAL AND IS NOT ACCESSIBLE TO THE USER.
***DIN BYTES 2 TO 4 MUST BE DRIVEN TO LOGIC 0 TO OBTAIN A VALID CONVERSION.
Figure 4. Internal Clock-Mode Conversion (Mode 2)
BYTE 2
BYTE 3
B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 X X
HOLD
1.0
ALL MODES
0.6
0.2
-0.2
-0.6
-1.0
-3 x VREF
-3 x VREF
0
+3 x VREF
2
2
ANALOG INPUT VOLTAGE (V)
+3 x VREF
MAX1032
R2
MAX1033
*RSOURCE IN_+
R1
ANALOG
SIGNAL
SOURCE
VSJ
R2
*RSOURCE IN_+
R1
ANALOG
SIGNAL
SOURCE
VSJ
Figure 5. Analog Input Current vs. Input Voltage
*MINIMIZE RSOURCE TO AVOID GAIN ERROR AND DISTORTION.
Figure 6. Simplified Analog Input Circuit
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